SPI_DEVICE/2P Simulation Results

Sunday May 11 2025 00:08:57 UTC

GitHub Revision: `4c0a27d`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	8.968m	281.304ms	50	50	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	2.880s	85.692us	5	5	100.00
V1	csr_rw	spi_device_csr_rw	4.000s	868.775us	20	20	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	34.670s	2.756ms	5	5	100.00
V1	csr_aliasing	spi_device_csr_aliasing	16.620s	2.967ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	5.320s	256.222us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	4.000s	868.775us	20	20	100.00
		spi_device_csr_aliasing	16.620s	2.967ms	5	5	100.00
V1	mem_walk	spi_device_mem_walk	2.240s	38.566us	5	5	100.00
V1	mem_partial_access	spi_device_mem_partial_access	3.670s	96.710us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	csb_read	spi_device_csb_read	2.350s	57.675us	50	50	100.00
V2	mem_parity	spi_device_mem_parity	2.590s	30.088us	20	20	100.00
V2	mem_cfg	spi_device_ram_cfg	1.890s	38.019us	1	1	100.00
V2	tpm_read	spi_device_tpm_rw	9.500s	969.583us	50	50	100.00
V2	tpm_write	spi_device_tpm_rw	9.500s	969.583us	50	50	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	33.830s	32.592ms	50	50	100.00
		spi_device_tpm_sts_read	2.600s	252.356us	50	50	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	58.550s	9.766ms	50	50	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	38.860s	55.526ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	45.890s	57.481ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	45.890s	57.481ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_info_slots	spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_read_status	spi_device_intercept	27.010s	12.007ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_read_jedec	spi_device_intercept	27.010s	12.007ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_read_sfdp	spi_device_intercept	27.010s	12.007ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_fast_read	spi_device_intercept	27.010s	12.007ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	cmd_read_pipeline	spi_device_intercept	27.010s	12.007ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	flash_cmd_upload	spi_device_upload	35.640s	11.753ms	50	50	100.00
V2	mailbox_command	spi_device_mailbox	2.072m	19.040ms	50	50	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	2.072m	19.040ms	50	50	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	2.072m	19.040ms	50	50	100.00
V2	cmd_read_buffer	spi_device_flash_mode	55.180s	25.566ms	50	50	100.00
		spi_device_read_buffer_direct	17.620s	2.052ms	50	50	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	2.072m	19.040ms	50	50	100.00
		spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	quad_spi	spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	dual_spi	spi_device_flash_all	27.881m	1.500s	49	50	98.00
V2	4b_3b_feature	spi_device_cfg_cmd	21.080s	9.969ms	50	50	100.00
V2	write_enable_disable	spi_device_cfg_cmd	21.080s	9.969ms	50	50	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	8.968m	281.304ms	50	50	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	7.804m	65.679ms	50	50	100.00
V2	stress_all	spi_device_stress_all	14.591m	139.012ms	49	50	98.00
V2	alert_test	spi_device_alert_test	2.290s	16.814us	50	50	100.00
V2	intr_test	spi_device_intr_test	2.390s	19.823us	50	50	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	6.370s	230.444us	20	20	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	6.370s	230.444us	20	20	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	2.880s	85.692us	5	5	100.00
		spi_device_csr_rw	4.000s	868.775us	20	20	100.00
		spi_device_csr_aliasing	16.620s	2.967ms	5	5	100.00
		spi_device_same_csr_outstanding	6.360s	1.769ms	20	20	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	2.880s	85.692us	5	5	100.00
		spi_device_csr_rw	4.000s	868.775us	20	20	100.00
		spi_device_csr_aliasing	16.620s	2.967ms	5	5	100.00
		spi_device_same_csr_outstanding	6.360s	1.769ms	20	20	100.00
V2		TOTAL			959	961	99.79
V2S	tl_intg_err	spi_device_sec_cm	2.810s	141.430us	5	5	100.00
		spi_device_tl_intg_err	23.110s	1.060ms	20	20	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	23.110s	1.060ms	20	20	100.00
V2S		TOTAL			25	25	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	6.389m	73.318ms	50	50	100.00
		TOTAL			1149	1151	99.83

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.17	99.04	96.67	87.74	89.36	98.47	95.65	99.26

Failure Buckets

UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
- Test spi_device_flash_all has 1 failures.
  - 23.spi_device_flash_all.101475302790758532741343532598569121783212760475125891526463811938989261817204
    Line 112, in log /nightly/runs/scratch/master/spi_device_2p-sim-vcs/23.spi_device_flash_all/latest/run.log
```
  UVM_FATAL @ 1500000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1500000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 1500000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_ERROR (spi_device_scoreboard.sv:1032) scoreboard [scoreboard] Compare failed, downstream item: has 1 failures:

Test spi_device_stress_all has 1 failures.

40.spi_device_stress_all.106404702275308341805610067305570109141766264542426762189020440384910412311432
Line 86, in log /nightly/runs/scratch/master/spi_device_2p-sim-vcs/40.spi_device_stress_all/latest/run.log

  UVM_ERROR @ 18617728041 ps: (spi_device_scoreboard.sv:1032) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Compare failed, downstream item:
  -------------------------------------------------------------------------
  Name                               Type              Size  Value
  -------------------------------------------------------------------------
  host_item                          spi_item          -     @84605