USBDEV Simulation Results

Sunday May 11 2025 00:08:57 UTC

GitHub Revision: 4c0a27d

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 2.870s 242.211us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 2.180s 93.552us 5 5 100.00
V1 csr_rw usbdev_csr_rw 2.600s 49.825us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 7.250s 662.705us 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.820s 147.319us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 3.000s 92.769us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 2.600s 49.825us 20 20 100.00
usbdev_csr_aliasing 3.820s 147.319us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.290s 491.075us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 3.120s 211.944us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 2.770s 237.579us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 3.610s 564.112us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 2.430s 72.068us 50 50 100.00
V2 av_buffer usbdev_av_buffer 2.850s 205.223us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 1.027m 22.379ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 2.450s 319.443us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 2.270s 204.448us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 2.820s 235.798us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 2.520s 197.144us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 2.210s 172.636us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 2.490s 217.464us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 2.510s 180.869us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 2.790s 255.971us 50 50 100.00
usbdev_stream_len_max 5.930s 1.338ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 2.830s 254.035us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 2.600s 156.948us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 2.610s 224.246us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 2.740s 213.637us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 2.810s 218.164us 50 50 100.00
V2 out_stall usbdev_out_stall 2.760s 212.076us 50 50 100.00
V2 in_stall usbdev_in_stall 2.590s 169.269us 50 50 100.00
V2 out_iso usbdev_out_iso 2.630s 170.648us 50 50 100.00
V2 in_iso usbdev_in_iso 3.040s 241.085us 50 50 100.00
V2 pkt_received usbdev_pkt_received 2.780s 212.028us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 2.850s 274.047us 50 50 100.00
V2 disconnected usbdev_disconnected 2.600s 177.735us 50 50 100.00
V2 host_lost usbdev_host_lost 13.470s 4.179ms 1 1 100.00
V2 link_reset usbdev_link_reset 2.270s 174.219us 1 1 100.00
V2 link_suspend usbdev_link_suspend 16.360s 11.008ms 50 50 100.00
V2 link_resume usbdev_link_resume 54.700s 29.365ms 50 50 100.00
V2 av_empty usbdev_av_empty 2.610s 214.300us 5 5 100.00
V2 rx_full usbdev_rx_full 3.240s 427.132us 50 50 100.00
V2 av_overflow usbdev_av_overflow 2.580s 178.134us 5 5 100.00
V2 link_in_err usbdev_link_in_err 2.770s 265.816us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 2.620s 162.205us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 2.530s 147.135us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 2.580s 146.713us 50 50 100.00
V2 link_out_err usbdev_link_out_err 2.640s 529.421us 1 1 100.00
V2 enable usbdev_enable 2.430s 65.146us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 37.800s 20.182ms 20 20 100.00
V2 device_address usbdev_device_address 1.268m 50.558ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 2.880s 506.551us 1 1 100.00
V2 setup_stage usbdev_setup_stage 2.630s 216.655us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 4.840s 1.049ms 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 4.000s 1.174ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 3.600s 648.876us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 2.710s 270.395us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 2.640s 179.658us 50 50 100.00
V2 nak_trans usbdev_nak_trans 2.760s 196.214us 50 50 100.00
V2 stall_trans usbdev_stall_trans 2.720s 186.268us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 2.760s 339.993us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 2.620s 172.062us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 2.590s 182.645us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.701m 4.386ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 3.090m 118.183ms 5 5 100.00
usbdev_freq_loclk 2.927m 113.098ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 2.995m 103.365ms 5 5 100.00
usbdev_freq_loclk_max 2.577m 119.022ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.452m 98.172ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.646m 4.148ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.582m 3.970ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 36.550s 7.273ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 41.950s 7.291ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 1.027m 22.379ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 3.120s 463.464us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 50.650s 30.011ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 32.890s 20.685ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 21.510s 9.795ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 2.050m 5.477ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.303m 3.808ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 1.987m 5.581ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 2.263m 8.900ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 2.393m 9.708ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 2.487m 9.545ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.374m 3.554ms 25 25 100.00
usbdev_max_usb_traffic 56.950s 2.674ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 3.823m 15.326ms 10 10 100.00
V2 in_packet_retraction usbdev_iso_retraction 1.936m 12.685ms 50 50 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 5.010s 983.077us 50 50 100.00
V2 setup_priority usbdev_setup_priority 3.080s 431.690us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 5.060s 477.879us 50 50 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 3.740s 607.135us 500 500 100.00
V2 fifo_levels usbdev_fifo_levels 3.140s 345.532us 160 160 100.00
V2 intr_test usbdev_intr_test 3.730s 59.020us 50 50 100.00
V2 alert_test usbdev_alert_test 2.410s 120.986us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.750s 233.885us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.750s 233.885us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 2.180s 93.552us 5 5 100.00
usbdev_csr_rw 2.600s 49.825us 20 20 100.00
usbdev_csr_aliasing 3.820s 147.319us 5 5 100.00
usbdev_same_csr_outstanding 3.610s 675.765us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 2.180s 93.552us 5 5 100.00
usbdev_csr_rw 2.600s 49.825us 20 20 100.00
usbdev_csr_aliasing 3.820s 147.319us 5 5 100.00
usbdev_same_csr_outstanding 3.610s 675.765us 20 20 100.00
V2 TOTAL 3764 3764 100.00
V2S tl_intg_err usbdev_sec_cm 4.120s 1.175ms 5 5 100.00
usbdev_tl_intg_err 5.200s 1.474ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.200s 1.474ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 1.781m 5.114ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 2.310s 61.627us 0 10 0.00
usbdev_stress_all 2.250s 0 50 0.00
TOTAL 3905 3965 98.49

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
97.62 98.62 95.77 97.23 96.61 98.40 98.05 98.64

Failure Buckets