AON_TIMER Simulation Results

Sunday May 25 2025 00:06:37 UTC

GitHub Revision: 2a67071

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	3.260s	642.688us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	4.260s	1.249ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	3.250s	516.166us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	28.490s	12.033ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.210s	540.367us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.980s	374.502us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	3.250s	516.166us	20	20	100.00
		aon_timer_csr_aliasing	3.210s	540.367us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	2.570s	418.446us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.590s	277.248us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.758m	61.624ms	15	15	100.00
V2	jump	aon_timer_jump	4.200s	737.930us	5	5	100.00
V2	stress_all	aon_timer_stress_all	3.502m	150.897ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.360s	486.472us	50	50	100.00
V2	intr_test	aon_timer_intr_test	3.050s	464.506us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.880s	436.852us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.880s	436.852us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	4.260s	1.249ms	5	5	100.00
		aon_timer_csr_rw	3.250s	516.166us	20	20	100.00
		aon_timer_csr_aliasing	3.210s	540.367us	5	5	100.00
		aon_timer_same_csr_outstanding	6.540s	2.972ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	4.260s	1.249ms	5	5	100.00
		aon_timer_csr_rw	3.250s	516.166us	20	20	100.00
		aon_timer_csr_aliasing	3.210s	540.367us	5	5	100.00
		aon_timer_same_csr_outstanding	6.540s	2.972ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	24.130s	7.809ms	5	5	100.00
		aon_timer_tl_intg_err	15.410s	7.880ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	15.410s	7.880ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.800s	648.788us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.630s	669.084us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	5.460s	3.807ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.860s	709.120us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	17.390s	4.203ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	49.630s	17.891ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
100.00	100.00	100.00	100.00	--	100.00	100.00	100.00