AON_TIMER Simulation Results

Sunday June 15 2025 00:13:27 UTC

GitHub Revision: c4214fe

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	3.290s	577.217us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.100s	1.236ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.930s	439.812us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	28.970s	13.097ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.370s	572.456us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.920s	320.384us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.930s	439.812us	20	20	100.00
		aon_timer_csr_aliasing	3.370s	572.456us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	2.380s	355.846us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.860s	483.056us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	55.850s	43.322ms	15	15	100.00
V2	jump	aon_timer_jump	2.660s	677.553us	5	5	100.00
V2	stress_all	aon_timer_stress_all	2.684m	125.771ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.210s	457.604us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.820s	392.155us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	5.420s	552.768us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	5.420s	552.768us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.100s	1.236ms	5	5	100.00
		aon_timer_csr_rw	2.930s	439.812us	20	20	100.00
		aon_timer_csr_aliasing	3.370s	572.456us	5	5	100.00
		aon_timer_same_csr_outstanding	5.460s	1.542ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.100s	1.236ms	5	5	100.00
		aon_timer_csr_rw	2.930s	439.812us	20	20	100.00
		aon_timer_csr_aliasing	3.370s	572.456us	5	5	100.00
		aon_timer_same_csr_outstanding	5.460s	1.542ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.760s	7.906ms	5	5	100.00
		aon_timer_tl_intg_err	15.060s	7.913ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	15.060s	7.913ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	3.080s	573.044us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.680s	565.932us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	8.120s	3.553ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.830s	592.825us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	10.250s	4.072ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	39.550s	15.866ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.29	99.09	99.05	100.00	--	98.56	99.05	100.00