AON_TIMER Simulation Results

Sunday June 22 2025 00:12:31 UTC

GitHub Revision: 4a542c3

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.410s	494.443us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	4.020s	873.938us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	3.580s	451.930us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	7.060s	13.645ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.480s	527.913us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	3.310s	541.434us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	3.580s	451.930us	20	20	100.00
		aon_timer_csr_aliasing	3.480s	527.913us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	3.070s	355.374us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	3.050s	494.279us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.076m	41.632ms	15	15	100.00
V2	jump	aon_timer_jump	3.930s	723.463us	5	5	100.00
V2	stress_all	aon_timer_stress_all	5.680m	253.252ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.220s	499.894us	50	50	100.00
V2	intr_test	aon_timer_intr_test	3.020s	502.399us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.400s	593.571us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.400s	593.571us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	4.020s	873.938us	5	5	100.00
		aon_timer_csr_rw	3.580s	451.930us	20	20	100.00
		aon_timer_csr_aliasing	3.480s	527.913us	5	5	100.00
		aon_timer_same_csr_outstanding	6.400s	2.065ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	4.020s	873.938us	5	5	100.00
		aon_timer_csr_rw	3.580s	451.930us	20	20	100.00
		aon_timer_csr_aliasing	3.480s	527.913us	5	5	100.00
		aon_timer_same_csr_outstanding	6.400s	2.065ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	19.700s	7.753ms	5	5	100.00
		aon_timer_tl_intg_err	14.060s	8.285ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	14.060s	8.285ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.590s	556.436us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	3.410s	709.274us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	9.430s	3.643ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.030s	705.322us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	20.300s	4.263ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	44.480s	36.546ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.29	99.09	99.05	100.00	--	98.56	99.05	100.00