I2C Simulation Results

Sunday September 07 2025 00:10:53 UTC

GitHub Revision: `6adf14f`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	1.689m	5.834ms	50	50	100.00
V1	target_smoke	i2c_target_smoke	39.000s	3.086ms	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.040s	59.886us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.030s	24.432us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	3.930s	367.537us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	1.690s	141.206us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.480s	38.639us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.030s	24.432us	20	20	100.00
		i2c_csr_aliasing	1.690s	141.206us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	4.230s	413.400us	6	50	12.00
V2	host_stress_all	i2c_host_stress_all	54.871m	57.071ms	15	50	30.00
V2	host_maxperf	i2c_host_perf	44.804m	48.211ms	50	50	100.00
V2	host_override	i2c_host_override	0.970s	110.184us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	4.130m	20.422ms	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	2.961m	2.546ms	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.650s	1.278ms	50	50	100.00
		i2c_host_fifo_fmt_empty	28.440s	8.670ms	50	50	100.00
		i2c_host_fifo_reset_rx	12.280s	237.451us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	3.459m	3.755ms	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	39.860s	4.072ms	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.920s	230.097us	17	50	34.00
V2	target_glitch	i2c_target_glitch	4.780s	1.056ms	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	43.710m	85.970ms	50	50	100.00
V2	target_maxperf	i2c_target_perf	8.720s	2.023ms	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	1.063m	1.677ms	50	50	100.00
		i2c_target_intr_smoke	12.130s	11.498ms	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.510s	544.460us	50	50	100.00
		i2c_target_fifo_reset_tx	2.330s	503.133us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	19.678m	63.913ms	50	50	100.00
		i2c_target_stress_rd	1.063m	1.677ms	50	50	100.00
		i2c_target_intr_stress_wr	5.936m	25.004ms	50	50	100.00
V2	target_timeout	i2c_target_timeout	9.560s	2.664ms	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	2.508m	3.601ms	45	50	90.00
V2	bad_address	i2c_target_bad_addr	8.090s	9.756ms	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	44.340s	10.058ms	25	50	50.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.500s	714.613us	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.130s	653.049us	49	50	98.00
V2	host_mode_config_perf	i2c_host_perf	44.804m	48.211ms	50	50	100.00
		i2c_host_perf_precise	37.730m	23.204ms	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	39.860s	4.072ms	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	21.780s	1.381ms	49	50	98.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	4.110s	3.282ms	50	50	100.00
		i2c_target_nack_acqfull_addr	4.100s	2.123ms	50	50	100.00
		i2c_target_nack_txstretch	2.320s	1.857ms	32	50	64.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	22.310s	613.607us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.480s	506.316us	50	50	100.00
V2	alert_test	i2c_alert_test	0.940s	18.152us	50	50	100.00
V2	intr_test	i2c_intr_test	0.920s	19.264us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.300s	52.212us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.300s	52.212us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.040s	59.886us	5	5	100.00
		i2c_csr_rw	1.030s	24.432us	20	20	100.00
		i2c_csr_aliasing	1.690s	141.206us	5	5	100.00
		i2c_same_csr_outstanding	1.320s	214.041us	20	20	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.040s	59.886us	5	5	100.00
		i2c_csr_rw	1.030s	24.432us	20	20	100.00
		i2c_csr_aliasing	1.690s	141.206us	5	5	100.00
		i2c_same_csr_outstanding	1.320s	214.041us	20	20	100.00
V2		TOTAL			1628	1792	90.85
V2S	tl_intg_err	i2c_tl_intg_err	2.530s	460.107us	20	20	100.00
		i2c_sec_cm	1.240s	241.398us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.530s	460.107us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	43.130s	3.991ms	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	4.060s	478.527us	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	16.420s	1.646ms	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1808	2042	88.54

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
84.49	97.31	89.36	74.17	48.21	93.97	98.52	89.85

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 82 failures:

Test i2c_host_error_intr has 44 failures.

0.i2c_host_error_intr.82680277608074459363363170599211652402329256475055526287841301701792876100449
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  68169609 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  68169609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.73034871451564148972733129783086090199337242799391324978408884563080002318894
Line 131, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 281065715 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 281065715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 42 more failures.

Test i2c_host_stress_all has 26 failures.

0.i2c_host_stress_all.84907358238479861178053408487506692510025509512282507098104454832320559333670
Line 112, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 3603799308 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 3603799308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all.33935379907992899410176499187140913262220263630448759849421911710294426949816
Line 119, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 153824081 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 153824081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 24 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

2.i2c_target_stress_all_with_rand_reset.50340026559288824602099611757962517017586458735590343570137956779864893270760
Line 98, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1921987066 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 1921987066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.i2c_target_stress_all_with_rand_reset.1936602469129607604349397835957088795113785358974241932103212390237333302246
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 385244234 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 385244234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

Test i2c_host_mode_toggle has 8 failures.

2.i2c_host_mode_toggle.61650704411439553890778013306645009738988296252997772732002901718543147665474
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @   6630051 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   6630051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

18.i2c_host_mode_toggle.41757960772191455387887533701261651752176963053298505104957008902211772361660
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 107826244 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 107826244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 29 failures:
- Test i2c_target_unexp_stop has 29 failures.
  - 0.i2c_target_unexp_stop.70944142028733609378838905909141612684993863834350105942746562656493543867352
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 371886733 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 189 [0xbd])
  UVM_INFO @ 371886733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_unexp_stop.87637350088857046969609102505798981011556651082511647330361031732964562364790
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 515136714 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 192 [0xc0])
  UVM_INFO @ 515136714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 27 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 25 failures:
- Test i2c_target_hrst has 25 failures.
  - 1.i2c_target_hrst.35080248217771283583034453208191361248176742484335159906123505404709370930290
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10099681147 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10099681147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_hrst.89162082982961117572502714267647241749769170565418850633284445402203922075284
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10022791788 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10022791788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 23 more failures.
UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 18 failures:
- Test i2c_target_unexp_stop has 18 failures.
  - 6.i2c_target_unexp_stop.96530496411399728102036803577043540273253181901994309688133660025889169047708
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  17951307 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @  17951307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 7.i2c_target_unexp_stop.99569285097907934206786220813751502267925598827302876237145340065282220235275
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 417996385 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 417996385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 16 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 18 failures:
- Test i2c_target_nack_txstretch has 18 failures.
  - 9.i2c_target_nack_txstretch.28247652513281443564444611981594644574703854380321799337921599414200097443681
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 144080523 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 144080523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 10.i2c_target_nack_txstretch.63825774966553487615561269822596498451562220525252843434466411883321752163254
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 599034059 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 599034059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 16 more failures.

UVM_ERROR (cip_base_vseq.sv:945) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 16 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.19665789771981702988478518848295427677392725375994663568221770191536000586936
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 3080050616 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 3080050616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.39012108562601988677120069367024990762105762144627149796413228422661696085924
Line 85, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 856406290 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 856406290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 6 failures.

0.i2c_target_stress_all_with_rand_reset.75173833322628568842006417547681880451623339014863350531226071980590973006679
Line 92, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 255190482 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 255190482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_stress_all_with_rand_reset.88418564455179214247866294134348119524050747085978271334284314626005309132604
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 884725909 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 884725909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 16 failures:

Test i2c_host_mode_toggle has 10 failures.

0.i2c_host_mode_toggle.33781151543733219699356451814765294362877623858833154911254016063243414529235
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 285029305 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @50921

8.i2c_host_mode_toggle.105342580973544523255060954309398221790821882201286118266732784384114377650882
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 162539970 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @94413

... and 8 more failures.

Test i2c_host_stress_all has 6 failures.

7.i2c_host_stress_all.36816821504678314578853158652235504521230983504377254601535894886416620753320
Line 136, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 29298001684 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3194738

8.i2c_host_stress_all.81546416575596494157006298029641753507844850577679336810142749089753495033649
Line 162, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 152815569885 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @17791500

... and 4 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 11 failures:

Test i2c_host_mode_toggle has 11 failures.

3.i2c_host_mode_toggle.27359710129542225531645561543179256869219981624757054280880805445464105355788
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  88923626 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

9.i2c_host_mode_toggle.105850148261821556715443269527893935469378442062484941466073072073797864130121
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  13652867 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 9 more failures.

UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 5 failures:
- Test i2c_target_stretch has 5 failures.
  - 4.i2c_target_stretch.76270509063313621969957822697463346332998387281172132669930381174201697274249
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10092626111 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10092626111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 11.i2c_target_stretch.68126444104490372291577625194832391497301340774631805558116150877043776889242
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10002810222 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10002810222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 3 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 4 failures:
- Test i2c_host_mode_toggle has 4 failures.
  - 19.i2c_host_mode_toggle.5015788916168533537710676186171224055802810583696251469328307257898301406181
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/19.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  41108193 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x8f37e094, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  41108193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 25.i2c_host_mode_toggle.34604963725359345552150291702469526566909907519426239064021641468819065561068
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/25.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  52767134 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x4ff9d014, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  52767134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.
Job timed out after * minutes has 3 failures:
- Test i2c_host_stress_all has 3 failures.
  - 3.i2c_host_stress_all.91768121460322067789182914175781205256596656638549509159944592142848792815103
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - 11.i2c_host_stress_all.111217038871452028223477058204951223610854930028708647233327233411140017409090
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - ... and 1 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 3 failures:

Test i2c_target_unexp_stop has 3 failures.

20.i2c_target_unexp_stop.69491524283447136873174534602289786660049325382067378739315610004925059548981
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/20.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 110576943 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 110576943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

27.i2c_target_unexp_stop.1837220359776948927545808295048216133100124150014856914598232187009454831834
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/27.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 641740579 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 641740579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.4948231668882056616675384709592970515600551623051842688617962607904821485766
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 1056425394 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 1056425394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.18104012587358606164236214185769093479309293799838312528347775961841071176995
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 1941766778 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 1941766778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Error-[CNST-CIF] Constraints inconsistency failure has 2 failures:
- Test i2c_target_tx_stretch_ctrl has 1 failures.
  - 33.i2c_target_tx_stretch_ctrl.52376149686233147817292301683686135680316623340707870155844210825986065518923
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/33.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
- Test i2c_target_fifo_watermarks_tx has 1 failures.
  - 37.i2c_target_fifo_watermarks_tx.56639193774342701360329882917852801857153412304087890709162843983034525647737
    Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/37.i2c_target_fifo_watermarks_tx/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 845
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```