6adf14f| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 1.070m | 15.909ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.430s | 31.186us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 1.470s | 45.968us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 17.280s | 5.237ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 8.660s | 1.464ms | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 3.020s | 254.203us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 1.470s | 45.968us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 8.660s | 1.464ms | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 1.060s | 18.810us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.830s | 741.362us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 51.639m | 176.291ms | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 14.545m | 63.970ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 23.175m | 69.984ms | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 27.100m | 65.231ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 24.597m | 67.585ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 17.583m | 626.238ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 38.573m | 496.416ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 28.128m | 158.552ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 3.270s | 466.938us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 2.770s | 730.960us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 7.964m | 22.983ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 5.321m | 34.427ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 4.678m | 14.756ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 6.198m | 32.311ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 5.893m | 19.929ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 13.080s | 1.985ms | 49 | 50 | 98.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 1.905m | 10.074ms | 34 | 50 | 68.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 38.720s | 6.135ms | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 47.780s | 4.624ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 54.420s | 19.215ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 26.080s | 1.397ms | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 33.017m | 99.438ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 1.100s | 17.658us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 1.150s | 27.517us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 4.690s | 685.135us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 4.690s | 685.135us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.430s | 31.186us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.470s | 45.968us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 8.660s | 1.464ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.960s | 567.327us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.430s | 31.186us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.470s | 45.968us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 8.660s | 1.464ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.960s | 567.327us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 723 | 740 | 97.70 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 2.420s | 72.298us | 20 | 20 | 100.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 2.420s | 72.298us | 20 | 20 | 100.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 2.420s | 72.298us | 20 | 20 | 100.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 2.420s | 72.298us | 20 | 20 | 100.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 6.470s | 263.106us | 19 | 20 | 95.00 |
| V2S | tl_intg_err | kmac_sec_cm | 1.016m | 38.423ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 5.580s | 248.061us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 5.580s | 248.061us | 20 | 20 | 100.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 26.080s | 1.397ms | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 1.070m | 15.909ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 7.964m | 22.983ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 2.420s | 72.298us | 20 | 20 | 100.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 1.016m | 38.423ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 1.016m | 38.423ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 1.016m | 38.423ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 1.070m | 15.909ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 26.080s | 1.397ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 1.016m | 38.423ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 4.100m | 87.183ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 1.070m | 15.909ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 74 | 75 | 98.67 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 2.598m | 11.224ms | 6 | 10 | 60.00 |
| V3 | TOTAL | 6 | 10 | 60.00 | |||
| TOTAL | 918 | 940 | 97.66 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 93.92 | 97.69 | 94.41 | 100.00 | 73.55 | 96.04 | 99.35 | 96.40 |
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 5 failures:
30.kmac_sideload_invalid.85215287482622242924184932018021869116197370175566084318376800658001063463995
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/30.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10030460861 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3869000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10030460861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
33.kmac_sideload_invalid.31754267448671395512769747225140184167418181753243412602123639576436317875084
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/33.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10043459929 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf11a0000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10043459929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_ERROR (cip_base_vseq.sv:945) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 4 failures:
4.kmac_stress_all_with_rand_reset.79556939814677398166383547635471128549480228135979555020731032144725384931827
Line 363, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/4.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 9393856843 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 9393856843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.kmac_stress_all_with_rand_reset.102321200683750568282037972486737296093015905743160503699366665796210611125365
Line 192, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 7429361138 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 7429361138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 3 failures:
5.kmac_sideload_invalid.49878272107517840675606691770779253647437117856993937959017336605832061967939
Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10036371804 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xdc1bb000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10036371804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
15.kmac_sideload_invalid.16266095158867801273725331906867473571255731327749004758712103909688982275892
Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/15.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10082713722 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x7d879000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10082713722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
1.kmac_sideload_invalid.1502888238028780608190257565025308349725178062134521881682220436001010058454
Line 82, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10074239116 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1861d000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10074239116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=14) has 1 failures:
8.kmac_sideload_invalid.28865777054258025265036165814722946676431140193308256116656359208052938785370
Line 91, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10428647433 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc156c000, Comparison=CompareOpEq, exp_data=0x1, call_count=14)
UVM_INFO @ 10428647433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=32) has 1 failures:
10.kmac_sideload_invalid.42022100607750538597550655279064442862587496102684117422625730982366505088364
Line 109, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/10.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 11570344032 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xae601000, Comparison=CompareOpEq, exp_data=0x1, call_count=32)
UVM_INFO @ 11570344032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.prefix_* reset value: * has 1 failures:
13.kmac_shadow_reg_errors_with_csr_rw.12177808262283666911513551589516624312760940040869668192714789523580770222336
Line 139, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/13.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 18338854 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (603591090 [0x23fa11b2] vs 0 [0x0]) Regname: kmac_reg_block.prefix_1 reset value: 0x0
UVM_INFO @ 18338854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 1 failures:
17.kmac_sideload_invalid.17716761995178407433424494048657916444348283136031843693997988622779449790451
Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/17.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10041985805 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa7db4000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10041985805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
29.kmac_sideload_invalid.12964791482027270728771018267547194274355524706353723306348498618957575686403
Line 80, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/29.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10194762846 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x43c6a000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10194762846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 1 failures:
32.kmac_sideload_invalid.16940514772386663038693619137173539137476870170766185149104209227539213414132
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/32.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10057754911 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x50420000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10057754911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 1 failures:
38.kmac_sideload_invalid.46384026686748176500371713008688006639625474434116760750502048781516102595346
Line 85, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10163828499 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1b0df000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10163828499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=25) has 1 failures:
47.kmac_sideload_invalid.84712644053235415265162091998841382427855552673593670561933844322052533960429
Line 102, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/47.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10253715830 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1c851000, Comparison=CompareOpEq, exp_data=0x1, call_count=25)
UVM_INFO @ 10253715830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set! has 1 failures:
47.kmac_key_error.9872862456788678790291134541398883521208966371391727478772145693714341423332
Line 94, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/47.kmac_key_error/latest/run.log
UVM_ERROR @ 1034563376 ps: (kmac_base_vseq.sv:382) [uvm_test_top.env.virtual_sequencer.kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == 1) intr_pins[KmacErr] is not set!
UVM_INFO @ 1034563376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---