SRAM_CTRL/RET Simulation Results

Sunday September 14 2025 00:09:11 UTC

GitHub Revision: e14e4d4

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	sram_ctrl_smoke	1.675m	157.327us	50	50	100.00
V1	csr_hw_reset	sram_ctrl_csr_hw_reset	0.970s	54.646us	5	5	100.00
V1	csr_rw	sram_ctrl_csr_rw	0.980s	20.564us	20	20	100.00
V1	csr_bit_bash	sram_ctrl_csr_bit_bash	2.470s	129.892us	5	5	100.00
V1	csr_aliasing	sram_ctrl_csr_aliasing	0.980s	66.835us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	sram_ctrl_csr_mem_rw_with_rand_reset	2.070s	390.649us	19	20	95.00
V1	regwen_csr_and_corresponding_lockable_csr	sram_ctrl_csr_rw	0.980s	20.564us	20	20	100.00
		sram_ctrl_csr_aliasing	0.980s	66.835us	5	5	100.00
V1	mem_walk	sram_ctrl_mem_walk	13.970s	1.034ms	50	50	100.00
V1	mem_partial_access	sram_ctrl_mem_partial_access	7.330s	380.428us	50	50	100.00
V1		TOTAL			204	205	99.51
V2	multiple_keys	sram_ctrl_multiple_keys	22.087m	14.388ms	50	50	100.00
V2	stress_pipeline	sram_ctrl_stress_pipeline	5.684m	3.085ms	50	50	100.00
V2	bijection	sram_ctrl_bijection	1.255m	3.507ms	50	50	100.00
V2	access_during_key_req	sram_ctrl_access_during_key_req	24.413m	10.431ms	50	50	100.00
V2	lc_escalation	sram_ctrl_lc_escalation	12.830s	3.785ms	50	50	100.00
V2	executable	sram_ctrl_executable	27.973m	19.720ms	50	50	100.00
V2	partial_access	sram_ctrl_partial_access	1.674m	6.690ms	50	50	100.00
		sram_ctrl_partial_access_b2b	10.721m	46.823ms	50	50	100.00
V2	max_throughput	sram_ctrl_max_throughput	1.602m	274.441us	50	50	100.00
		sram_ctrl_throughput_w_partial_write	1.615m	602.316us	50	50	100.00
		sram_ctrl_throughput_w_readback	1.792m	512.037us	50	50	100.00
V2	regwen	sram_ctrl_regwen	22.573m	63.303ms	50	50	100.00
V2	ram_cfg	sram_ctrl_ram_cfg	1.170s	35.298us	50	50	100.00
V2	stress_all	sram_ctrl_stress_all	1.235h	161.309ms	50	50	100.00
V2	alert_test	sram_ctrl_alert_test	1.010s	14.779us	50	50	100.00
V2	tl_d_oob_addr_access	sram_ctrl_tl_errors	5.530s	149.300us	20	20	100.00
V2	tl_d_illegal_access	sram_ctrl_tl_errors	5.530s	149.300us	20	20	100.00
V2	tl_d_outstanding_access	sram_ctrl_csr_hw_reset	0.970s	54.646us	5	5	100.00
		sram_ctrl_csr_rw	0.980s	20.564us	20	20	100.00
		sram_ctrl_csr_aliasing	0.980s	66.835us	5	5	100.00
		sram_ctrl_same_csr_outstanding	1.130s	42.606us	20	20	100.00
V2	tl_d_partial_access	sram_ctrl_csr_hw_reset	0.970s	54.646us	5	5	100.00
		sram_ctrl_csr_rw	0.980s	20.564us	20	20	100.00
		sram_ctrl_csr_aliasing	0.980s	66.835us	5	5	100.00
		sram_ctrl_same_csr_outstanding	1.130s	42.606us	20	20	100.00
V2		TOTAL			790	790	100.00
V2S	passthru_mem_tl_intg_err	sram_ctrl_passthru_mem_tl_intg_err	4.670s	2.557ms	20	20	100.00
V2S	tl_intg_err	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
		sram_ctrl_tl_intg_err	3.480s	2.172ms	20	20	100.00
V2S	prim_count_check	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
V2S	sec_cm_bus_integrity	sram_ctrl_tl_intg_err	3.480s	2.172ms	20	20	100.00
V2S	sec_cm_ctrl_config_regwen	sram_ctrl_regwen	22.573m	63.303ms	50	50	100.00
V2S	sec_cm_readback_config_regwen	sram_ctrl_regwen	22.573m	63.303ms	50	50	100.00
V2S	sec_cm_exec_config_regwen	sram_ctrl_csr_rw	0.980s	20.564us	20	20	100.00
V2S	sec_cm_exec_config_mubi	sram_ctrl_executable	27.973m	19.720ms	50	50	100.00
V2S	sec_cm_exec_intersig_mubi	sram_ctrl_executable	27.973m	19.720ms	50	50	100.00
V2S	sec_cm_lc_hw_debug_en_intersig_mubi	sram_ctrl_executable	27.973m	19.720ms	50	50	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	sram_ctrl_lc_escalation	12.830s	3.785ms	50	50	100.00
V2S	sec_cm_prim_ram_ctrl_mubi	sram_ctrl_mubi_enc_err	1.780s	116.938us	43	50	86.00
V2S	sec_cm_mem_integrity	sram_ctrl_passthru_mem_tl_intg_err	4.670s	2.557ms	20	20	100.00
V2S	sec_cm_mem_readback	sram_ctrl_readback_err	1.610s	64.725us	43	50	86.00
V2S	sec_cm_mem_scramble	sram_ctrl_smoke	1.675m	157.327us	50	50	100.00
V2S	sec_cm_addr_scramble	sram_ctrl_smoke	1.675m	157.327us	50	50	100.00
V2S	sec_cm_instr_bus_lc_gated	sram_ctrl_executable	27.973m	19.720ms	50	50	100.00
V2S	sec_cm_ram_tl_lc_gate_fsm_sparse	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
V2S	sec_cm_key_global_esc	sram_ctrl_lc_escalation	12.830s	3.785ms	50	50	100.00
V2S	sec_cm_key_local_esc	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
V2S	sec_cm_init_ctr_redun	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
V2S	sec_cm_scramble_key_sideload	sram_ctrl_smoke	1.675m	157.327us	50	50	100.00
V2S	sec_cm_tlul_fifo_ctr_redun	sram_ctrl_sec_cm	1.080s	24.680us	0	5	0.00
V2S		TOTAL			126	145	86.90
V3	stress_all_with_rand_reset	sram_ctrl_stress_all_with_rand_reset	9.669m	9.450ms	50	50	100.00
V3		TOTAL			50	50	100.00
		TOTAL			1170	1190	98.32

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.64	99.07	92.90	85.37	100.00	97.98	95.79	98.33

Failure Buckets

• UVM_ERROR (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (*) != exp (*) has 7 failures:

  • Test sram_ctrl_readback_err has 7 failures.

    • 3.sram_ctrl_readback_err.19217926805836022190005005143329989600083405817607278396396990060865620814285
      Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/3.sram_ctrl_readback_err/latest/run.log

        UVM_ERROR @  69332096 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x3e) != exp (0x75)
        UVM_INFO @  69332096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 26.sram_ctrl_readback_err.30638671208620670625982920424293692378194342980815254845824354541118394513710
      Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/26.sram_ctrl_readback_err/latest/run.log

        UVM_ERROR @  52709136 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x3e) != exp (0x42)
        UVM_INFO @  52709136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 5 more failures.

• Offending 'reqfifo_rvalid' has 7 failures:

  • Test sram_ctrl_mubi_enc_err has 7 failures.

    • 6.sram_ctrl_mubi_enc_err.61389009039606284984874691382255631054383117788326749578361290907488641261668
      Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/6.sram_ctrl_mubi_enc_err/latest/run.log

            Offending 'reqfifo_rvalid'
        UVM_ERROR @  32424485 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
        UVM_INFO @  32424485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 17.sram_ctrl_mubi_enc_err.29672108975634182849870766950200851968910644398443509682746480896691108046144
      Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/17.sram_ctrl_mubi_enc_err/latest/run.log

            Offending 'reqfifo_rvalid'
        UVM_ERROR @  53882559 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
        UVM_INFO @  53882559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 5 more failures.

• UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: * has 3 failures:

  • Test sram_ctrl_sec_cm has 3 failures.

    • 0.sram_ctrl_sec_cm.31998503604957449085994994604710644259759431237589982524176168936303615536582
      Line 97, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/0.sram_ctrl_sec_cm/latest/run.log

        UVM_ERROR @  14187698 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
        UVM_INFO @  14187698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.sram_ctrl_sec_cm.44046564181182749097766843346962824366344026147959538517684846557758061420145
      Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log

        UVM_ERROR @   6927458 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
        UVM_INFO @   6927458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 1 more failures.

• Offending '(!$isunknown(rdata_o))' has 2 failures:

  • Test sram_ctrl_sec_cm has 2 failures.

    • 2.sram_ctrl_sec_cm.36404130812709741541288273046186396092577642093659205055460714720053918631036
      Line 98, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/2.sram_ctrl_sec_cm/latest/run.log

            Offending '(!$isunknown(rdata_o))'
        UVM_ERROR @   4790776 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A
        UVM_INFO @   4790776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 4.sram_ctrl_sec_cm.20892503565514060821116099069428743249138069825943964550106786317785170125063
      Line 98, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/4.sram_ctrl_sec_cm/latest/run.log

            Offending '(!$isunknown(rdata_o))'
        UVM_ERROR @  21652721 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A
        UVM_INFO @  21652721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: * has 1 failures:

  • Test sram_ctrl_csr_mem_rw_with_rand_reset has 1 failures.

    • 0.sram_ctrl_csr_mem_rw_with_rand_reset.50045334290810928833309899566165821280315426168590711102678706049396307136623
      Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/0.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log

        UVM_ERROR @  96964839 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (8 [0x8] vs 9 [0x9]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: 0x9
        UVM_INFO @  96964839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---