1a5d173| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 56.650s | 15.959ms | 42 | 50 | 84.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 22.452s | 4 | 5 | 80.00 | |
| V1 | csr_rw | kmac_csr_rw | 30.885s | 17 | 20 | 85.00 | |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 13.520s | 1.454ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 24.211s | 4 | 5 | 80.00 | |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 22.270s | 17 | 20 | 85.00 | |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 30.885s | 17 | 20 | 85.00 | |
| kmac_csr_aliasing | 24.211s | 4 | 5 | 80.00 | |||
| V1 | mem_walk | kmac_mem_walk | 22.093s | 4 | 5 | 80.00 | |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.200s | 101.277us | 5 | 5 | 100.00 |
| V1 | TOTAL | 98 | 115 | 85.22 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 43.651m | 1.646s | 37 | 50 | 74.00 |
| V2 | burst_write | kmac_burst_write | 17.301m | 32.787ms | 41 | 50 | 82.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 28.635m | 94.660ms | 3 | 5 | 60.00 |
| kmac_test_vectors_sha3_256 | 24.410m | 340.150ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 15.954m | 45.803ms | 4 | 5 | 80.00 | ||
| kmac_test_vectors_sha3_512 | 22.592s | 2 | 5 | 40.00 | |||
| kmac_test_vectors_shake_128 | 33.114m | 107.628ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 25.441m | 235.120ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 2.220s | 209.982us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 2.050s | 61.348us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 6.491m | 83.327ms | 37 | 50 | 74.00 |
| V2 | app | kmac_app | 4.789m | 23.329ms | 38 | 50 | 76.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 3.804m | 77.816ms | 6 | 10 | 60.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 5.114m | 66.711ms | 37 | 50 | 74.00 |
| V2 | error | kmac_error | 5.808m | 74.227ms | 41 | 50 | 82.00 |
| V2 | key_error | kmac_key_error | 37.645s | 41 | 50 | 82.00 | |
| V2 | sideload_invalid | kmac_sideload_invalid | 25.478s | 45 | 50 | 90.00 | |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 29.110s | 591.847us | 19 | 20 | 95.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 27.410s | 2.339ms | 16 | 20 | 80.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 45.950s | 8.159ms | 8 | 10 | 80.00 |
| V2 | lc_escalation | kmac_lc_escalation | 33.820s | 7.205ms | 34 | 50 | 68.00 |
| V2 | stress_all | kmac_stress_all | 29.547m | 287.290ms | 37 | 50 | 74.00 |
| V2 | intr_test | kmac_intr_test | 28.406s | 44 | 50 | 88.00 | |
| V2 | alert_test | kmac_alert_test | 46.322s | 39 | 50 | 78.00 | |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 24.133s | 16 | 20 | 80.00 | |
| V2 | tl_d_illegal_access | kmac_tl_errors | 24.133s | 16 | 20 | 80.00 | |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 22.452s | 4 | 5 | 80.00 | |
| kmac_csr_rw | 30.885s | 17 | 20 | 85.00 | |||
| kmac_csr_aliasing | 24.211s | 4 | 5 | 80.00 | |||
| kmac_same_csr_outstanding | 24.609s | 19 | 20 | 95.00 | |||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 22.452s | 4 | 5 | 80.00 | |
| kmac_csr_rw | 30.885s | 17 | 20 | 85.00 | |||
| kmac_csr_aliasing | 24.211s | 4 | 5 | 80.00 | |||
| kmac_same_csr_outstanding | 24.609s | 19 | 20 | 95.00 | |||
| V2 | TOTAL | 589 | 740 | 79.59 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 22.581s | 16 | 20 | 80.00 | |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 22.581s | 16 | 20 | 80.00 | |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 22.581s | 16 | 20 | 80.00 | |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 22.581s | 16 | 20 | 80.00 | |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 22.510s | 17 | 20 | 85.00 | |
| V2S | tl_intg_err | kmac_sec_cm | 1.164m | 74.401ms | 4 | 5 | 80.00 |
| kmac_tl_intg_err | 22.437s | 16 | 20 | 80.00 | |||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 22.437s | 16 | 20 | 80.00 | |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 33.820s | 7.205ms | 34 | 50 | 68.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 56.650s | 15.959ms | 42 | 50 | 84.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 6.491m | 83.327ms | 37 | 50 | 74.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 22.581s | 16 | 20 | 80.00 | |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 1.164m | 74.401ms | 4 | 5 | 80.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 1.164m | 74.401ms | 4 | 5 | 80.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 1.164m | 74.401ms | 4 | 5 | 80.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 56.650s | 15.959ms | 42 | 50 | 84.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 33.820s | 7.205ms | 34 | 50 | 68.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 1.164m | 74.401ms | 4 | 5 | 80.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 3.990m | 7.829ms | 8 | 10 | 80.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 56.650s | 15.959ms | 42 | 50 | 84.00 |
| V2S | TOTAL | 61 | 75 | 81.33 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 2.959m | 81.327ms | 7 | 10 | 70.00 |
| V3 | TOTAL | 7 | 10 | 70.00 | |||
| TOTAL | 755 | 940 | 80.32 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 95.01 | 99.20 | 94.45 | 99.89 | 78.87 | 97.08 | 97.83 | 97.71 |
Job returned non-zero exit code has 160 failures:
Test kmac_mubi has 1 failures.
0.kmac_mubi.10595019444561610167521520660278385716964657305184486382723185321852324509046
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/0.kmac_mubi/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 12:31 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test kmac_mem_walk has 1 failures.
0.kmac_mem_walk.101739118862928236410131651192034077660480623274262166924281460956130024197826
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/0.kmac_mem_walk/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 13:58 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test kmac_tl_intg_err has 3 failures.
0.kmac_tl_intg_err.76435583060981430763439967496544422834577195367264158382956363467697366057732
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/0.kmac_tl_intg_err/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 13:58 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
10.kmac_tl_intg_err.81868311534551746577526595834118196668777369313683352128829009795080643819253
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/10.kmac_tl_intg_err/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 14:01 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
... and 1 more failures.
Test kmac_test_vectors_sha3_224 has 2 failures.
1.kmac_test_vectors_sha3_224.35697214483939124709478952040826573003681571986793103993699502963859095329948
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/1.kmac_test_vectors_sha3_224/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 12:32 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
2.kmac_test_vectors_sha3_224.7214322221861173183480716677386717938471281783240913350094267854178952161361
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/2.kmac_test_vectors_sha3_224/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 12:36 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test kmac_app has 10 failures.
1.kmac_app.88274424550661758921912700333276029281160563150407266079192287683655678047909
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/1.kmac_app/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 12:33 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
14.kmac_app.64052924977931066445890324896292029809763806076339810064791020604456749415183
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/14.kmac_app/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 21 13:10 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
... and 8 more failures.
... and 28 more tests.
Job timed out after * minutes has 24 failures:
Test kmac_test_vectors_sha3_512 has 2 failures.
0.kmac_test_vectors_sha3_512.39026517344352931419809839312689146394533348532539839188731975846724292345
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/0.kmac_test_vectors_sha3_512/latest/run.log
Job timed out after 60 minutes
2.kmac_test_vectors_sha3_512.68052092866246629488823489872115919178557759349235320300078085707663191333621
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/2.kmac_test_vectors_sha3_512/latest/run.log
Job timed out after 60 minutes
Test kmac_error has 1 failures.
0.kmac_error.23927883274263032375559976660176050254826348206358593877878758961484942833770
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/0.kmac_error/latest/run.log
Job timed out after 60 minutes
Test kmac_sideload has 4 failures.
1.kmac_sideload.98168874730700115042982612590339107086369585385045425902560554405336235228514
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/1.kmac_sideload/latest/run.log
Job timed out after 60 minutes
5.kmac_sideload.42336074789471328736230806534447702956614795984847565727633449484104351489731
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/5.kmac_sideload/latest/run.log
Job timed out after 60 minutes
... and 2 more failures.
Test kmac_shadow_reg_errors has 1 failures.
1.kmac_shadow_reg_errors.49374226615351703827598828096878308365107537367421457750333362313978991081937
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/1.kmac_shadow_reg_errors/latest/run.log
Job timed out after 60 minutes
Test kmac_smoke has 1 failures.
3.kmac_smoke.106850647322705685451756507245239523165960308353781974737943962707457477253009
Log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/3.kmac_smoke/latest/run.log
Job timed out after 60 minutes
... and 11 more tests.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.intr_state.kmac_done reset value: * has 1 failures:
22.kmac_stress_all.95384551363667481717032826012152717411894138113752410235005745363837412568987
Line 370, in log /nightly/current_run/scratch/master/kmac_masked-sim-vcs/22.kmac_stress_all/latest/run.log
UVM_ERROR @ 29586541403 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: kmac_reg_block.intr_state.kmac_done reset value: 0x0
UVM_INFO @ 29586541403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---