KMAC/UNMASKED Simulation Results

Sunday September 28 2025 00:12:59 UTC

GitHub Revision: c5877ed

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	kmac_smoke	1.147m	16.749ms	50	50	100.00
V1	csr_hw_reset	kmac_csr_hw_reset	1.460s	103.067us	5	5	100.00
V1	csr_rw	kmac_csr_rw	1.520s	32.504us	20	20	100.00
V1	csr_bit_bash	kmac_csr_bit_bash	14.220s	10.680ms	5	5	100.00
V1	csr_aliasing	kmac_csr_aliasing	11.000s	2.161ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	kmac_csr_mem_rw_with_rand_reset	3.210s	165.735us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	kmac_csr_rw	1.520s	32.504us	20	20	100.00
		kmac_csr_aliasing	11.000s	2.161ms	5	5	100.00
V1	mem_walk	kmac_mem_walk	1.090s	36.692us	5	5	100.00
V1	mem_partial_access	kmac_mem_partial_access	1.870s	143.966us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	long_msg_and_output	kmac_long_msg_and_output	54.116m	492.194ms	50	50	100.00
V2	burst_write	kmac_burst_write	16.158m	81.997ms	50	50	100.00
V2	test_vectors	kmac_test_vectors_sha3_224	22.320m	18.138ms	5	5	100.00
		kmac_test_vectors_sha3_256	26.952m	976.811ms	5	5	100.00
		kmac_test_vectors_sha3_384	23.274m	69.324ms	5	5	100.00
		kmac_test_vectors_sha3_512	16.474m	48.946ms	5	5	100.00
		kmac_test_vectors_shake_128	35.813m	369.232ms	5	5	100.00
		kmac_test_vectors_shake_256	25.188m	725.517ms	5	5	100.00
		kmac_test_vectors_kmac	2.660s	116.287us	5	5	100.00
		kmac_test_vectors_kmac_xof	2.970s	155.299us	5	5	100.00
V2	sideload	kmac_sideload	6.558m	146.351ms	50	50	100.00
V2	app	kmac_app	5.252m	94.903ms	50	50	100.00
V2	app_with_partial_data	kmac_app_with_partial_data	5.818m	199.500ms	10	10	100.00
V2	entropy_refresh	kmac_entropy_refresh	5.405m	37.921ms	50	50	100.00
V2	error	kmac_error	7.267m	83.496ms	50	50	100.00
V2	key_error	kmac_key_error	14.790s	12.803ms	50	50	100.00
V2	sideload_invalid	kmac_sideload_invalid	1.837m	10.083ms	39	50	78.00
V2	edn_timeout_error	kmac_edn_timeout_error	39.520s	1.478ms	20	20	100.00
V2	entropy_mode_error	kmac_entropy_mode_error	42.170s	4.113ms	20	20	100.00
V2	entropy_ready_error	kmac_entropy_ready_error	1.016m	24.658ms	10	10	100.00
V2	lc_escalation	kmac_lc_escalation	42.520s	708.279us	50	50	100.00
V2	stress_all	kmac_stress_all	32.127m	275.578ms	50	50	100.00
V2	intr_test	kmac_intr_test	1.220s	23.409us	50	50	100.00
V2	alert_test	kmac_alert_test	1.310s	174.267us	50	50	100.00
V2	tl_d_oob_addr_access	kmac_tl_errors	4.500s	1.122ms	20	20	100.00
V2	tl_d_illegal_access	kmac_tl_errors	4.500s	1.122ms	20	20	100.00
V2	tl_d_outstanding_access	kmac_csr_hw_reset	1.460s	103.067us	5	5	100.00
		kmac_csr_rw	1.520s	32.504us	20	20	100.00
		kmac_csr_aliasing	11.000s	2.161ms	5	5	100.00
		kmac_same_csr_outstanding	3.040s	230.878us	20	20	100.00
V2	tl_d_partial_access	kmac_csr_hw_reset	1.460s	103.067us	5	5	100.00
		kmac_csr_rw	1.520s	32.504us	20	20	100.00
		kmac_csr_aliasing	11.000s	2.161ms	5	5	100.00
		kmac_same_csr_outstanding	3.040s	230.878us	20	20	100.00
V2		TOTAL			729	740	98.51
V2S	shadow_reg_update_error	kmac_shadow_reg_errors	2.900s	100.743us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	kmac_shadow_reg_errors	2.900s	100.743us	20	20	100.00
V2S	shadow_reg_storage_error	kmac_shadow_reg_errors	2.900s	100.743us	20	20	100.00
V2S	shadowed_reset_glitch	kmac_shadow_reg_errors	2.900s	100.743us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	kmac_shadow_reg_errors_with_csr_rw	5.690s	497.832us	20	20	100.00
V2S	tl_intg_err	kmac_sec_cm	1.020m	8.144ms	5	5	100.00
		kmac_tl_intg_err	5.250s	197.986us	20	20	100.00
V2S	sec_cm_bus_integrity	kmac_tl_intg_err	5.250s	197.986us	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	kmac_lc_escalation	42.520s	708.279us	50	50	100.00
V2S	sec_cm_sw_key_key_masking	kmac_smoke	1.147m	16.749ms	50	50	100.00
V2S	sec_cm_key_sideload	kmac_sideload	6.558m	146.351ms	50	50	100.00
V2S	sec_cm_cfg_shadowed_config_shadow	kmac_shadow_reg_errors	2.900s	100.743us	20	20	100.00
V2S	sec_cm_fsm_sparse	kmac_sec_cm	1.020m	8.144ms	5	5	100.00
V2S	sec_cm_ctr_redun	kmac_sec_cm	1.020m	8.144ms	5	5	100.00
V2S	sec_cm_packer_ctr_redun	kmac_sec_cm	1.020m	8.144ms	5	5	100.00
V2S	sec_cm_cfg_shadowed_config_regwen	kmac_smoke	1.147m	16.749ms	50	50	100.00
V2S	sec_cm_fsm_global_esc	kmac_lc_escalation	42.520s	708.279us	50	50	100.00
V2S	sec_cm_fsm_local_esc	kmac_sec_cm	1.020m	8.144ms	5	5	100.00
V2S	sec_cm_absorbed_ctrl_mubi	kmac_mubi	5.396m	34.471ms	10	10	100.00
V2S	sec_cm_sw_cmd_ctrl_sparse	kmac_smoke	1.147m	16.749ms	50	50	100.00
V2S		TOTAL			75	75	100.00
V3	stress_all_with_rand_reset	kmac_stress_all_with_rand_reset	3.147m	13.796ms	8	10	80.00
V3		TOTAL			8	10	80.00
		TOTAL			927	940	98.62

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
93.44	97.59	94.48	100.00	71.90	95.97	97.74	96.40

Failure Buckets

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 2 failures:

  • Test kmac_sideload_invalid has 2 failures.

    • 0.kmac_sideload_invalid.107083799874692919889499777604261597387265245900557567037299449304288755272697
      Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10023285126 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x72c0c000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
        UVM_INFO @ 10023285126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 14.kmac_sideload_invalid.48248890303870483695529653613586513093544358999505480898330169047388623363126
      Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/14.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10174746927 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x533a7000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
        UVM_INFO @ 10174746927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (cip_base_vseq.sv:1229) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 2 failures:

  • Test kmac_stress_all_with_rand_reset has 2 failures.

    • 3.kmac_stress_all_with_rand_reset.106354959703615303810829983792362013840804505429598826426144348733267207691087
      Line 118, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log

        UVM_ERROR @ 1449134472 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
        UVM_INFO @ 1449134472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 8.kmac_stress_all_with_rand_reset.104606146256156243624717868151134523128105781312731437581253066297322601064897
      Line 145, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_stress_all_with_rand_reset/latest/run.log

        UVM_ERROR @ 6645803973 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
        UVM_INFO @ 6645803973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 2 failures:

  • Test kmac_sideload_invalid has 2 failures.

    • 10.kmac_sideload_invalid.10441742635737979988239754414993845378448066702046994089971998753866210127270
      Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/10.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10018856543 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8f4dc000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10018856543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 12.kmac_sideload_invalid.30901198487526920431778044178402410224761207672711093535849519284687980295473
      Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/12.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10018984019 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe567d000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10018984019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=13) has 2 failures:

  • Test kmac_sideload_invalid has 2 failures.

    • 23.kmac_sideload_invalid.4318056120994730663206095455367367396961181558520500436351278429889991149720
      Line 90, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/23.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10186329654 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf454f000, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
        UVM_INFO @ 10186329654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 49.kmac_sideload_invalid.112714018002573200613279643601508013329673668101933040378916502120269510318741
      Line 87, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10366670096 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf8a4000, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
        UVM_INFO @ 10366670096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 4.kmac_sideload_invalid.25106997189540015811672971339624195526691511690142693596066560854197406010878
      Line 83, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/4.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10086242016 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe301b000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
        UVM_INFO @ 10086242016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 8.kmac_sideload_invalid.24400954291249245114694111863491513331972255855104827210797088931707475175245
      Line 80, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10177224700 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd51af000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
        UVM_INFO @ 10177224700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=15) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 33.kmac_sideload_invalid.98747536583749030609143608577303804228558355406656756706167980030953682999590
      Line 91, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/33.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10083177005 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8269e000, Comparison=CompareOpEq, exp_data=0x1, call_count=15)
        UVM_INFO @ 10083177005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 38.kmac_sideload_invalid.25675525158035741448997946464812312851867167346932018157651059898703992084199
      Line 87, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10373286825 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf5be1000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
        UVM_INFO @ 10373286825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 48.kmac_sideload_invalid.111910599509897669098848941920139946972223126444213773615992161501733469859965
      Line 86, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/48.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10077911595 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd611f000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)
        UVM_INFO @ 10077911595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---