USBDEV Simulation Results

Sunday September 28 2025 00:12:59 UTC

GitHub Revision: c5877ed

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.570s 260.329us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.600s 244.705us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.410s 96.185us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 5.330s 624.292us 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.670s 292.783us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 3.200s 150.584us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.410s 96.185us 20 20 100.00
usbdev_csr_aliasing 3.670s 292.783us 5 5 100.00
V1 mem_walk usbdev_mem_walk 5.680s 717.918us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.840s 171.368us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.650s 233.479us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 2.510s 593.119us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 1.240s 33.873us 50 50 100.00
V2 av_buffer usbdev_av_buffer 1.430s 244.901us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 46.010s 20.594ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.580s 305.599us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 1.480s 218.303us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.560s 238.590us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.530s 300.727us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.660s 260.020us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.520s 222.602us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 1.440s 178.427us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.530s 286.195us 50 50 100.00
usbdev_stream_len_max 4.710s 1.428ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.710s 253.579us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 1.400s 163.136us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.470s 175.752us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.520s 240.405us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.590s 247.865us 50 50 100.00
V2 out_stall usbdev_out_stall 1.540s 230.926us 50 50 100.00
V2 in_stall usbdev_in_stall 1.370s 150.204us 50 50 100.00
V2 out_iso usbdev_out_iso 1.590s 177.656us 50 50 100.00
V2 in_iso usbdev_in_iso 1.860s 303.892us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.570s 218.057us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.610s 235.100us 50 50 100.00
V2 disconnected usbdev_disconnected 1.470s 212.545us 50 50 100.00
V2 host_lost usbdev_host_lost 13.300s 4.230ms 1 1 100.00
V2 link_reset usbdev_link_reset 1.320s 173.822us 1 1 100.00
V2 link_suspend usbdev_link_suspend 16.200s 8.678ms 50 50 100.00
V2 link_resume usbdev_link_resume 1.122m 33.322ms 50 50 100.00
V2 av_empty usbdev_av_empty 1.360s 163.251us 5 5 100.00
V2 rx_full usbdev_rx_full 1.830s 390.314us 50 50 100.00
V2 av_overflow usbdev_av_overflow 1.230s 153.076us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.660s 246.037us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.460s 171.983us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 1.340s 167.870us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 1.420s 150.483us 50 50 100.00
V2 link_out_err usbdev_link_out_err 2.260s 505.561us 1 1 100.00
V2 enable usbdev_enable 1.250s 32.861us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 37.360s 20.166ms 20 20 100.00
V2 device_address usbdev_device_address 1.053m 48.555ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 2.040s 453.484us 1 1 100.00
V2 setup_stage usbdev_setup_stage 1.450s 209.147us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 3.580s 875.114us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 2.990s 998.407us 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 2.570s 671.612us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.470s 152.333us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 1.370s 156.817us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.590s 211.143us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.490s 222.096us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.510s 302.025us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.400s 189.556us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 1.450s 191.340us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.325m 4.065ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.764m 86.220ms 5 5 100.00
usbdev_freq_loclk 2.715m 98.136ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 2.605m 98.356ms 5 5 100.00
usbdev_freq_loclk_max 2.650m 111.142ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.934m 120.159ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.341m 4.438ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.338m 3.446ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 44.780s 7.686ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 43.740s 7.082ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 46.010s 20.594ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 2.200s 600.126us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 1.060m 31.277ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 41.380s 21.192ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 20.020s 11.875ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 1.701m 4.561ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.223m 3.519ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 1.829m 4.684ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 2.268m 9.672ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 3.686m 13.817ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 2.447m 10.762ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.310m 3.702ms 25 25 100.00
usbdev_max_usb_traffic 1.463m 3.754ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 2.539m 10.764ms 10 10 100.00
V2 in_packet_retraction usbdev_iso_retraction 1.741m 12.639ms 50 50 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 4.590s 1.278ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 2.120s 399.818us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 3.810s 563.323us 50 50 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 2.550s 626.106us 500 500 100.00
V2 fifo_levels usbdev_fifo_levels 1.780s 322.939us 160 160 100.00
V2 rxenable_out_conditional usbdev_rxenable_out 1.320s 212.558us 5 5 100.00
V2 intr_test usbdev_intr_test 1.200s 95.829us 50 50 100.00
V2 alert_test usbdev_alert_test 1.240s 34.582us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 4.010s 122.675us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 4.010s 122.675us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.600s 244.705us 5 5 100.00
usbdev_csr_rw 1.410s 96.185us 20 20 100.00
usbdev_csr_aliasing 3.670s 292.783us 5 5 100.00
usbdev_same_csr_outstanding 2.510s 442.649us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.600s 244.705us 5 5 100.00
usbdev_csr_rw 1.410s 96.185us 20 20 100.00
usbdev_csr_aliasing 3.670s 292.783us 5 5 100.00
usbdev_same_csr_outstanding 2.510s 442.649us 20 20 100.00
V2 TOTAL 3769 3769 100.00
V2S tl_intg_err usbdev_sec_cm 3.060s 894.159us 5 5 100.00
usbdev_tl_intg_err 5.680s 829.319us 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.680s 829.319us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 9.580s 1.153ms 0 1 0.00
V3 TOTAL 0 1 0.00
Unmapped tests usbdev_stress_all_with_rand_reset 1.050s 17.896us 0 10 0.00
usbdev_stress_all 1.110s 0 50 0.00
TOTAL 3909 3970 98.46

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
97.07 98.80 95.50 97.23 94.92 98.34 95.94 98.73

Failure Buckets