AON_TIMER Simulation Results

Sunday October 05 2025 00:13:39 UTC

GitHub Revision: 7302728

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.380s	644.689us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	1.870s	1.033ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.830s	512.863us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	18.960s	13.590ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.630s	627.212us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.250s	509.338us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.830s	512.863us	20	20	100.00
		aon_timer_csr_aliasing	2.630s	627.212us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.670s	404.876us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.060s	282.009us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.276m	43.994ms	15	15	100.00
V2	jump	aon_timer_jump	2.220s	649.873us	5	5	100.00
V2	stress_all	aon_timer_stress_all	4.014m	146.414ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.140s	518.895us	50	50	100.00
V2	intr_test	aon_timer_intr_test	1.750s	464.188us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.210s	596.565us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.210s	596.565us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	1.870s	1.033ms	5	5	100.00
		aon_timer_csr_rw	1.830s	512.863us	20	20	100.00
		aon_timer_csr_aliasing	2.630s	627.212us	5	5	100.00
		aon_timer_same_csr_outstanding	6.650s	2.023ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	1.870s	1.033ms	5	5	100.00
		aon_timer_csr_rw	1.830s	512.863us	20	20	100.00
		aon_timer_csr_aliasing	2.630s	627.212us	5	5	100.00
		aon_timer_same_csr_outstanding	6.650s	2.023ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	11.440s	4.399ms	5	5	100.00
		aon_timer_tl_intg_err	13.380s	7.929ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	13.380s	7.929ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.510s	512.611us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.110s	491.536us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	14.160s	3.870ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.200s	528.341us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	17.500s	4.124ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	36.430s	16.200ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00