AON_TIMER Simulation Results

Sunday October 12 2025 00:08:33 UTC

GitHub Revision: f01486e

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.860s	594.117us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.410s	828.931us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.820s	500.766us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	19.620s	13.714ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	1.760s	705.763us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	1.910s	520.398us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.820s	500.766us	20	20	100.00
		aon_timer_csr_aliasing	1.760s	705.763us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.300s	463.408us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.660s	431.088us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.715m	62.029ms	15	15	100.00
V2	jump	aon_timer_jump	1.870s	554.319us	5	5	100.00
V2	stress_all	aon_timer_stress_all	2.583m	146.127ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	1.710s	480.690us	50	50	100.00
V2	intr_test	aon_timer_intr_test	1.950s	508.947us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	2.740s	1.170ms	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	2.740s	1.170ms	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.410s	828.931us	5	5	100.00
		aon_timer_csr_rw	1.820s	500.766us	20	20	100.00
		aon_timer_csr_aliasing	1.760s	705.763us	5	5	100.00
		aon_timer_same_csr_outstanding	10.210s	2.701ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.410s	828.931us	5	5	100.00
		aon_timer_csr_rw	1.820s	500.766us	20	20	100.00
		aon_timer_csr_aliasing	1.760s	705.763us	5	5	100.00
		aon_timer_same_csr_outstanding	10.210s	2.701ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.120s	7.490ms	5	5	100.00
		aon_timer_tl_intg_err	18.120s	7.950ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	18.120s	7.950ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.080s	586.982us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.140s	661.131us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	10.180s	3.820ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.780s	651.515us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	21.360s	4.226ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	41.160s	21.032ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00