USBDEV Simulation Results

Sunday October 12 2025 00:08:33 UTC

GitHub Revision: f01486e

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.560s 308.801us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 0.930s 114.035us 5 5 100.00
V1 csr_rw usbdev_csr_rw 0.940s 160.095us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 6.400s 1.864ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 2.250s 284.155us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 1.980s 100.213us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 0.940s 160.095us 20 20 100.00
usbdev_csr_aliasing 2.250s 284.155us 5 5 100.00
V1 mem_walk usbdev_mem_walk 3.250s 621.522us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 1.830s 124.734us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.590s 230.865us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 2.620s 572.362us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 1.110s 40.981us 50 50 100.00
V2 av_buffer usbdev_av_buffer 1.390s 186.931us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 45.560s 16.342ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.140s 326.002us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.960s 156.446us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.600s 258.101us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.580s 255.541us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.300s 254.617us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.390s 212.049us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 1.360s 162.492us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.540s 242.405us 50 50 100.00
usbdev_stream_len_max 4.000s 1.408ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.590s 295.354us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 1.420s 168.846us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.420s 156.930us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.530s 266.980us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.520s 236.019us 50 50 100.00
V2 out_stall usbdev_out_stall 1.410s 243.220us 50 50 100.00
V2 in_stall usbdev_in_stall 1.290s 142.017us 50 50 100.00
V2 out_iso usbdev_out_iso 1.440s 249.692us 50 50 100.00
V2 in_iso usbdev_in_iso 1.740s 259.247us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.400s 199.302us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.490s 243.198us 50 50 100.00
V2 disconnected usbdev_disconnected 1.310s 156.096us 50 50 100.00
V2 host_lost usbdev_host_lost 11.890s 4.167ms 1 1 100.00
V2 link_reset usbdev_link_reset 1.230s 176.382us 1 1 100.00
V2 link_suspend usbdev_link_suspend 15.680s 9.479ms 50 50 100.00
V2 link_resume usbdev_link_resume 47.480s 29.374ms 50 50 100.00
V2 av_empty usbdev_av_empty 1.360s 190.567us 5 5 100.00
V2 rx_full usbdev_rx_full 1.970s 373.145us 50 50 100.00
V2 av_overflow usbdev_av_overflow 1.230s 141.694us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.530s 260.541us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.360s 158.701us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 1.290s 170.806us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 1.360s 182.335us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.860s 486.357us 1 1 100.00
V2 enable usbdev_enable 1.140s 54.634us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 27.550s 20.178ms 20 20 100.00
V2 device_address usbdev_device_address 1.185m 42.859ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.880s 498.894us 1 1 100.00
V2 setup_stage usbdev_setup_stage 1.340s 169.333us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 3.580s 977.606us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 2.790s 1.118ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 2.340s 551.139us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.440s 185.403us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 1.370s 152.846us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.500s 237.368us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.370s 215.851us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.480s 299.262us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.400s 180.093us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 1.440s 209.798us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.461m 4.223ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.729m 113.225ms 5 5 100.00
usbdev_freq_loclk 2.161m 99.101ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 3.112m 120.201ms 5 5 100.00
usbdev_freq_loclk_max 2.356m 106.035ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.676m 110.136ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.375m 3.878ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.410m 3.480ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 41.460s 6.596ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 34.130s 7.033ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 45.560s 16.342ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.380s 435.014us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 39.920s 30.021ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 30.730s 20.330ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 20.490s 11.006ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 1.967m 5.541ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.499m 3.793ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 1.909m 5.326ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 1.334m 3.711ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 1.111m 6.238ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 3.840m 14.130ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.222m 3.096ms 25 25 100.00
usbdev_max_usb_traffic 1.065m 2.975ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 3.774m 10.288ms 10 10 100.00
V2 in_packet_retraction usbdev_iso_retraction 2.113m 12.029ms 50 50 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 4.370s 1.384ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 2.120s 462.509us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 3.590s 456.807us 50 50 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 2.330s 497.302us 500 500 100.00
V2 fifo_levels usbdev_fifo_levels 1.750s 346.007us 160 160 100.00
V2 rxenable_out_conditional usbdev_rxenable_out 1.300s 161.242us 5 5 100.00
V2 intr_test usbdev_intr_test 1.410s 79.666us 50 50 100.00
V2 alert_test usbdev_alert_test 1.050s 135.708us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 2.580s 343.862us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 2.580s 343.862us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 0.930s 114.035us 5 5 100.00
usbdev_csr_rw 0.940s 160.095us 20 20 100.00
usbdev_csr_aliasing 2.250s 284.155us 5 5 100.00
usbdev_same_csr_outstanding 1.590s 291.339us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 0.930s 114.035us 5 5 100.00
usbdev_csr_rw 0.940s 160.095us 20 20 100.00
usbdev_csr_aliasing 2.250s 284.155us 5 5 100.00
usbdev_same_csr_outstanding 1.590s 291.339us 20 20 100.00
V2 TOTAL 3769 3769 100.00
V2S tl_intg_err usbdev_sec_cm 3.060s 1.697ms 5 5 100.00
usbdev_tl_intg_err 4.130s 1.796ms 19 20 95.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 4.130s 1.796ms 19 20 95.00
V2S TOTAL 24 25 96.00
V3 dpi_config_host usbdev_dpi_config_host 29.540s 5.131ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 1.010s 44.376us 0 10 0.00
usbdev_stress_all 0.910s 0 50 0.00
TOTAL 3909 3970 98.46

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
97.31 98.80 95.58 97.23 96.61 98.34 95.94 98.64

Failure Buckets