AON_TIMER Simulation Results

Sunday October 19 2025 00:12:47 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.040s	500.587us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.420s	970.402us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.870s	375.867us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	29.450s	13.482ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	1.890s	606.403us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.070s	486.483us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.870s	375.867us	20	20	100.00
		aon_timer_csr_aliasing	1.890s	606.403us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.880s	440.974us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.770s	402.577us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.246m	51.721ms	15	15	100.00
V2	jump	aon_timer_jump	1.850s	671.604us	5	5	100.00
V2	stress_all	aon_timer_stress_all	2.596m	113.140ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	1.990s	511.180us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.060s	445.010us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.420s	407.024us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.420s	407.024us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.420s	970.402us	5	5	100.00
		aon_timer_csr_rw	1.870s	375.867us	20	20	100.00
		aon_timer_csr_aliasing	1.890s	606.403us	5	5	100.00
		aon_timer_same_csr_outstanding	11.380s	2.766ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.420s	970.402us	5	5	100.00
		aon_timer_csr_rw	1.870s	375.867us	20	20	100.00
		aon_timer_csr_aliasing	1.890s	606.403us	5	5	100.00
		aon_timer_same_csr_outstanding	11.380s	2.766ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	18.610s	7.746ms	5	5	100.00
		aon_timer_tl_intg_err	18.390s	8.408ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	18.390s	8.408ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.430s	674.606us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	1.910s	669.377us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	7.920s	3.606ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.510s	655.670us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	18.790s	4.204ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	34.310s	9.699ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00