ENTROPY_SRC/RNG_4BITS Simulation Results

Sunday October 19 2025 00:12:47 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	3.000s	95.050us	50	50	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	24.000s	27.278us	5	5	100.00
V1	csr_rw	entropy_src_csr_rw	25.000s	17.923us	20	20	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	27.000s	317.238us	5	5	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	15.000s	48.157us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	4.000s	145.732us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	25.000s	17.923us	20	20	100.00
		entropy_src_csr_aliasing	15.000s	48.157us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	firmware	entropy_src_smoke	3.000s	95.050us	50	50	100.00
		entropy_src_rng	9.400m	20.053ms	300	300	100.00
		entropy_src_fw_ov	9.500m	20.030ms	297	300	99.00
V2	firmware_mode	entropy_src_fw_ov	9.500m	20.030ms	297	300	99.00
V2	rng_mode	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	14.700m	20.020ms	399	400	99.75
V2	health_checks	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2	conditioning	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2	interrupts	entropy_src_rng	9.400m	20.053ms	300	300	100.00
		entropy_src_intr	38.000s	513.658us	50	50	100.00
V2	alerts	entropy_src_rng	9.400m	20.053ms	300	300	100.00
		entropy_src_functional_alerts	8.000s	354.951us	50	50	100.00
V2	stress_all	entropy_src_stress_all	2.036h	10.000s	47	50	94.00
V2	functional_errors	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
V2	firmware_ov_read_contiguous_data	entropy_src_fw_ov_contiguous	23.000s	1.522ms	50	50	100.00
V2	intr_test	entropy_src_intr_test	27.000s	130.812us	50	50	100.00
V2	alert_test	entropy_src_alert_test	3.000s	43.823us	50	50	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	32.000s	534.847us	20	20	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	32.000s	534.847us	20	20	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	24.000s	27.278us	5	5	100.00
		entropy_src_csr_rw	25.000s	17.923us	20	20	100.00
		entropy_src_csr_aliasing	15.000s	48.157us	5	5	100.00
		entropy_src_same_csr_outstanding	4.000s	663.426us	20	20	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	24.000s	27.278us	5	5	100.00
		entropy_src_csr_rw	25.000s	17.923us	20	20	100.00
		entropy_src_csr_aliasing	15.000s	48.157us	5	5	100.00
		entropy_src_same_csr_outstanding	4.000s	663.426us	20	20	100.00
V2		TOTAL			2328	2340	99.49
V2S	tl_intg_err	entropy_src_sec_cm	3.000s	297.226us	5	5	100.00
		entropy_src_tl_intg_err	32.000s	192.755us	20	20	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	9.400m	20.053ms	300	300	100.00
		entropy_src_cfg_regwen	3.000s	23.947us	50	50	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2S	sec_cm_config_redun	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	9.400m	20.053ms	300	300	100.00
		entropy_src_fw_ov	9.500m	20.030ms	297	300	99.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
		entropy_src_sec_cm	3.000s	297.226us	5	5	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
		entropy_src_sec_cm	3.000s	297.226us	5	5	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	9.400m	20.053ms	300	300	100.00
V2S	sec_cm_fifo_ctr_redun	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
		entropy_src_sec_cm	3.000s	297.226us	5	5	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
		entropy_src_sec_cm	3.000s	297.226us	5	5	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	2.750m	10.023ms	995	1000	99.50
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	8.000s	354.951us	50	50	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	32.000s	192.755us	20	20	100.00
V2S		TOTAL			75	75	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	5.900m	13.085ms	50	50	100.00
V3		TOTAL			50	50	100.00
		TOTAL			2558	2570	99.53

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
94.17	97.38	93.30	98.36	95.16	80.02	97.92	89.27	96.17

Failure Buckets

• UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout entropy_src_reg_block.err_code.sfifo_observe_err (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 5 failures:

  • Test entropy_src_functional_errors has 5 failures.

    • 454.entropy_src_functional_errors.72027359197599035349824262314761648749802024525557656139367422370978142145114
      Line 167, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/454.entropy_src_functional_errors/latest/run.log

        UVM_FATAL @ 10016290489 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout entropy_src_reg_block.err_code.sfifo_observe_err (addr=0x60e8b9d4, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10016290489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 495.entropy_src_functional_errors.58092555037368590812357635080952291156515088384602978875608512989589228695336
      Line 167, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/495.entropy_src_functional_errors/latest/run.log

        UVM_FATAL @ 10121005437 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout entropy_src_reg_block.err_code.sfifo_observe_err (addr=0xe5599dd4, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10121005437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 3 more failures.

• Job timed out after * minutes has 2 failures:

  • Test entropy_src_stress_all has 2 failures.

    • 5.entropy_src_stress_all.107786930304478338688318697399113115969171198544971928926411737779179558376341
      Log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/5.entropy_src_stress_all/latest/run.log

        Job timed out after 180 minutes
      

    • 44.entropy_src_stress_all.85452867969939293755388739497763152763663679948743764652379914262976685138474
      Log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/44.entropy_src_stress_all/latest/run.log

        Job timed out after 180 minutes
      

• UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:

  • Test entropy_src_stress_all has 1 failures.

    • 16.entropy_src_stress_all.82949093576934660017923153731458803102867024389032702977580779978966088883757
      Line 898, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/16.entropy_src_stress_all/latest/run.log

        UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue
        UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (entropy_src_scoreboard.sv:2913) [scoreboard] Check failed prediction == csr_val (* [*] vs * [*]) Prediction for observe FIFO access failed. has 1 failures:

  • Test entropy_src_rng_max_rate has 1 failures.

    • 21.entropy_src_rng_max_rate.35253460976317424297852748533983296747213125011883178732172083183543064057455
      Line 892, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/21.entropy_src_rng_max_rate/latest/run.log

        UVM_FATAL @ 1153514874 ps: (entropy_src_scoreboard.sv:2913) [uvm_test_top.env.scoreboard] Check failed prediction == csr_val (0 [0x0] vs 17182615 [0x1062f97]) Prediction for observe FIFO access failed.
        UVM_INFO @ 1153514874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (cip_base_scoreboard.sv:268) [scoreboard] Check failed expected_alert[alert_name].expected == * (* [*] vs * [*]) alert recov_alert triggered unexpectedly has 1 failures:

  • Test entropy_src_fw_ov has 1 failures.

    • 231.entropy_src_fw_ov.30082808465116422079312766280899117294198103108382171147085697391225010320366
      Line 990, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/231.entropy_src_fw_ov/latest/run.log

        UVM_ERROR @ 3566855757 ps: (cip_base_scoreboard.sv:268) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert recov_alert triggered unexpectedly
        UVM_INFO @ 3566855757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (entropy_src_scoreboard.sv:2103) [scoreboard] Check failed fw_ov_wr_fifo_full_prediction == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.fw_ov_wr_fifo_full has 1 failures:

  • Test entropy_src_fw_ov has 1 failures.

    • 233.entropy_src_fw_ov.16821812374388675668965979208642844526589088872041486475482529330831159600931
      Line 1094, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/233.entropy_src_fw_ov/latest/run.log

        UVM_ERROR @ 11674177522 ps: (entropy_src_scoreboard.sv:2103) [uvm_test_top.env.scoreboard] Check failed fw_ov_wr_fifo_full_prediction == item.d_data (1 [0x1] vs 0 [0x0]) reg name: entropy_src_reg_block.fw_ov_wr_fifo_full
        UVM_INFO @ 11674177522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (entropy_src_scoreboard.sv:2879) [scoreboard] Check failed match_found == * (* [*] vs * [*]) All candidate csrng seeds have been checked, with no match has 1 failures:

  • Test entropy_src_fw_ov has 1 failures.

    • 275.entropy_src_fw_ov.8721248295797516303062311848498563665656636483909935135613116885132602445197
      Line 1758, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/275.entropy_src_fw_ov/latest/run.log

        UVM_FATAL @ 7903094196 ps: (entropy_src_scoreboard.sv:2879) [uvm_test_top.env.scoreboard] Check failed match_found == 1 (0 [0x0] vs 1 [0x1]) All candidate csrng seeds have been checked, with no match
        UVM_INFO @ 7903094196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---