8c9ab41| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | host_smoke | i2c_host_smoke | 1.274m | 4.105ms | 50 | 50 | 100.00 |
| V1 | target_smoke | i2c_target_smoke | 48.280s | 3.611ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | i2c_csr_hw_reset | 1.090s | 19.415us | 5 | 5 | 100.00 |
| V1 | csr_rw | i2c_csr_rw | 1.060s | 69.545us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | i2c_csr_bit_bash | 3.360s | 442.058us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | i2c_csr_aliasing | 1.980s | 464.797us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | i2c_csr_mem_rw_with_rand_reset | 1.550s | 40.206us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | i2c_csr_rw | 1.060s | 69.545us | 20 | 20 | 100.00 |
| i2c_csr_aliasing | 1.980s | 464.797us | 5 | 5 | 100.00 | ||
| V1 | TOTAL | 155 | 155 | 100.00 | |||
| V2 | host_error_intr | i2c_host_error_intr | 14.410s | 391.578us | 3 | 50 | 6.00 |
| V2 | host_stress_all | i2c_host_stress_all | 37.687m | 176.832ms | 11 | 50 | 22.00 |
| V2 | host_maxperf | i2c_host_perf | 42.356m | 27.554ms | 50 | 50 | 100.00 |
| V2 | host_override | i2c_host_override | 1.070s | 28.512us | 50 | 50 | 100.00 |
| V2 | host_fifo_watermark | i2c_host_fifo_watermark | 4.698m | 10.468ms | 50 | 50 | 100.00 |
| V2 | host_fifo_overflow | i2c_host_fifo_overflow | 2.108m | 9.499ms | 50 | 50 | 100.00 |
| V2 | host_fifo_reset | i2c_host_fifo_reset_fmt | 1.660s | 402.723us | 50 | 50 | 100.00 |
| i2c_host_fifo_fmt_empty | 20.780s | 1.821ms | 50 | 50 | 100.00 | ||
| i2c_host_fifo_reset_rx | 11.080s | 800.993us | 50 | 50 | 100.00 | ||
| V2 | host_fifo_full | i2c_host_fifo_full | 3.350m | 3.792ms | 50 | 50 | 100.00 |
| V2 | host_timeout | i2c_host_stretch_timeout | 41.990s | 20.861ms | 50 | 50 | 100.00 |
| V2 | i2c_host_mode_toggle | i2c_host_mode_toggle | 7.460s | 448.938us | 9 | 50 | 18.00 |
| V2 | target_glitch | i2c_target_glitch | 3.760s | 455.425us | 0 | 2 | 0.00 |
| V2 | target_stress_all | i2c_target_stress_all | 20.339m | 60.138ms | 50 | 50 | 100.00 |
| V2 | target_maxperf | i2c_target_perf | 8.660s | 1.093ms | 50 | 50 | 100.00 |
| V2 | target_fifo_empty | i2c_target_stress_rd | 1.044m | 1.750ms | 50 | 50 | 100.00 |
| i2c_target_intr_smoke | 9.860s | 2.107ms | 50 | 50 | 100.00 | ||
| V2 | target_fifo_reset | i2c_target_fifo_reset_acq | 2.420s | 274.536us | 50 | 50 | 100.00 |
| i2c_target_fifo_reset_tx | 2.280s | 270.545us | 50 | 50 | 100.00 | ||
| V2 | target_fifo_full | i2c_target_stress_wr | 16.347m | 59.830ms | 50 | 50 | 100.00 |
| i2c_target_stress_rd | 1.044m | 1.750ms | 50 | 50 | 100.00 | ||
| i2c_target_intr_stress_wr | 7.533m | 25.813ms | 49 | 50 | 98.00 | ||
| V2 | target_timeout | i2c_target_timeout | 10.250s | 3.194ms | 50 | 50 | 100.00 |
| V2 | target_clock_stretch | i2c_target_stretch | 3.346m | 4.626ms | 48 | 50 | 96.00 |
| V2 | bad_address | i2c_target_bad_addr | 8.540s | 5.662ms | 50 | 50 | 100.00 |
| V2 | target_mode_glitch | i2c_target_hrst | 37.770s | 10.150ms | 26 | 50 | 52.00 |
| V2 | target_fifo_watermark | i2c_target_fifo_watermarks_acq | 3.930s | 2.995ms | 50 | 50 | 100.00 |
| i2c_target_fifo_watermarks_tx | 2.350s | 709.271us | 50 | 50 | 100.00 | ||
| V2 | host_mode_config_perf | i2c_host_perf | 42.356m | 27.554ms | 50 | 50 | 100.00 |
| i2c_host_perf_precise | 5.553m | 24.731ms | 50 | 50 | 100.00 | ||
| V2 | host_mode_clock_stretching | i2c_host_stretch_timeout | 41.990s | 20.861ms | 50 | 50 | 100.00 |
| V2 | target_mode_tx_stretch_ctrl | i2c_target_tx_stretch_ctrl | 10.500s | 1.210ms | 47 | 50 | 94.00 |
| V2 | target_mode_nack_generation | i2c_target_nack_acqfull | 4.220s | 630.558us | 50 | 50 | 100.00 |
| i2c_target_nack_acqfull_addr | 4.080s | 2.227ms | 50 | 50 | 100.00 | ||
| i2c_target_nack_txstretch | 2.210s | 809.776us | 39 | 50 | 78.00 | ||
| V2 | host_mode_halt_on_nak | i2c_host_may_nack | 27.860s | 1.713ms | 50 | 50 | 100.00 |
| V2 | target_mode_smbus_maxlen | i2c_target_smbus_maxlen | 3.530s | 2.288ms | 50 | 50 | 100.00 |
| V2 | alert_test | i2c_alert_test | 1.010s | 38.716us | 50 | 50 | 100.00 |
| V2 | intr_test | i2c_intr_test | 0.960s | 21.147us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | i2c_tl_errors | 2.290s | 166.248us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | i2c_tl_errors | 2.290s | 166.248us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | i2c_csr_hw_reset | 1.090s | 19.415us | 5 | 5 | 100.00 |
| i2c_csr_rw | 1.060s | 69.545us | 20 | 20 | 100.00 | ||
| i2c_csr_aliasing | 1.980s | 464.797us | 5 | 5 | 100.00 | ||
| i2c_same_csr_outstanding | 1.450s | 512.388us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | i2c_csr_hw_reset | 1.090s | 19.415us | 5 | 5 | 100.00 |
| i2c_csr_rw | 1.060s | 69.545us | 20 | 20 | 100.00 | ||
| i2c_csr_aliasing | 1.980s | 464.797us | 5 | 5 | 100.00 | ||
| i2c_same_csr_outstanding | 1.450s | 512.388us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 1622 | 1792 | 90.51 | |||
| V2S | tl_intg_err | i2c_tl_intg_err | 2.210s | 153.212us | 20 | 20 | 100.00 |
| i2c_sec_cm | 1.470s | 129.618us | 5 | 5 | 100.00 | ||
| V2S | sec_cm_bus_integrity | i2c_tl_intg_err | 2.210s | 153.212us | 20 | 20 | 100.00 |
| V2S | TOTAL | 25 | 25 | 100.00 | |||
| V3 | host_stress_all_with_rand_reset | i2c_host_stress_all_with_rand_reset | 31.520s | 1.042ms | 0 | 10 | 0.00 |
| V3 | target_error_intr | i2c_target_unexp_stop | 3.480s | 2.068ms | 0 | 50 | 0.00 |
| V3 | target_stress_all_with_rand_reset | i2c_target_stress_all_with_rand_reset | 37.550s | 1.552ms | 0 | 10 | 0.00 |
| V3 | TOTAL | 0 | 70 | 0.00 | |||
| TOTAL | 1802 | 2042 | 88.25 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 84.25 | 97.37 | 89.44 | 74.17 | 48.81 | 94.11 | 96.41 | 89.43 |
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 84 failures:
0.i2c_host_error_intr.95000201314280236135834498458656804642278522857439542968715898055308178220592
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log
UVM_ERROR @ 67892756 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 67892756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.i2c_host_error_intr.49332726314858176223363799434062333719895379054973628103729559049017193385691
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log
UVM_ERROR @ 54803481 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 54803481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 45 more failures.
0.i2c_host_stress_all.96254833476565825173478978719153382854928306831229364530587537849322749255926
Line 94, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log
UVM_ERROR @ 6720257246 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 6720257246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.i2c_host_stress_all.82465864043688342819412617847239649871175711685709541690836835626658046035310
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_stress_all/latest/run.log
UVM_ERROR @ 65434179 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 65434179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 24 more failures.
0.i2c_target_stress_all_with_rand_reset.53411603682241655236124975939563989417954843135998283618597772257939325471348
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 735873807 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 735873807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.i2c_target_stress_all_with_rand_reset.39326692346743238737939021697139281055997267420295217850871571627661914539586
Line 99, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1856455329 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 1856455329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
1.i2c_host_mode_toggle.76205892284575466620810953505139618475519770172461250007300171804306586424349
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 3716196 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 3716196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.i2c_host_mode_toggle.40363848157478068310682816541997466009599109411537087450778666080798942254317
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 16006509 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 16006509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 5 more failures.
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 29 failures:
0.i2c_target_unexp_stop.51173139364635358333703828386833256270025373422726425996215524519731926492775
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
UVM_ERROR @ 536876873 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 247 [0xf7])
UVM_INFO @ 536876873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.i2c_target_unexp_stop.105733326923622792565543533941760639643217143698903927358350140896084866802217
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_unexp_stop/latest/run.log
UVM_ERROR @ 207338600 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 214 [0xd6])
UVM_INFO @ 207338600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 27 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 24 failures:
0.i2c_target_hrst.21899523070557543682236629251931801422757664936436171907241752110553778826051
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
UVM_FATAL @ 10072451002 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
UVM_INFO @ 10072451002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.i2c_target_hrst.29764931387952656588902687856268379321209985463870285808070836938268871466281
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_hrst/latest/run.log
UVM_FATAL @ 10278511675 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
UVM_INFO @ 10278511675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 22 more failures.
UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 20 failures:
1.i2c_host_stress_all.15813664205163197622159325019578024943981600205693146318925461997289478572511
Line 125, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log
UVM_ERROR @ 68517568840 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @12141119
2.i2c_host_stress_all.35586866299243249445012197345887391150722740208864051691266522410381762084578
Line 159, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log
UVM_ERROR @ 58787176081 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @12732809
... and 7 more failures.
8.i2c_host_mode_toggle.105380954742635109303267140507390474286558530607611149160423331529268562594079
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 86951705 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @69072
11.i2c_host_mode_toggle.84177896976228594740189376821532448179478152346058612914316603559470755951719
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 274051769 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @9872
... and 9 more failures.
UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 16 failures:
0.i2c_host_stress_all_with_rand_reset.73856826413816870030286989979993863161023345628915616794878441313205459099434
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 988394437 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 988394437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.i2c_host_stress_all_with_rand_reset.73392190049921037224965318594575627880854560036921288412378422801924713457042
Line 105, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 123239045 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 123239045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
2.i2c_target_stress_all_with_rand_reset.99139730339552364835291746880297723292378271392637464979806347646630690478777
Line 90, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 4024278794 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 4024278794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.i2c_target_stress_all_with_rand_reset.90472390952313628528284330553098270827919096553693982254166689581116945308668
Line 111, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1551896050 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1551896050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 15 failures:
0.i2c_host_mode_toggle.107532373535636516003902116056768563009982781514900034098464014903723379156484
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 381081143 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
--> EXP:
---------------------------------------------------
Name Type Size Value
---------------------------------------------------
2.i2c_host_mode_toggle.29376135599490330855984735765325300241090416890897061056398745938529590619876
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log
UVM_ERROR @ 82314512 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
--> EXP:
---------------------------------------------------
Name Type Size Value
---------------------------------------------------
... and 13 more failures.
UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 14 failures:
3.i2c_target_unexp_stop.21942832656200098672400968250054222915220030946756510051509166336320551437297
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
UVM_ERROR @ 11062006 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
UVM_INFO @ 11062006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.i2c_target_unexp_stop.6794648231920036530438395272288633266640978472748128326760383603557457539179
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_unexp_stop/latest/run.log
UVM_ERROR @ 164892590 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
UVM_INFO @ 164892590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 12 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 11 failures:
5.i2c_target_nack_txstretch.76070022911340733939330458034611675886673129053933597483349348693762610484528
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_nack_txstretch/latest/run.log
UVM_ERROR @ 166909615 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
UVM_INFO @ 166909615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
14.i2c_target_nack_txstretch.97027655767416444385369234038767944916518779192230859880164591973004410118778
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/14.i2c_target_nack_txstretch/latest/run.log
UVM_ERROR @ 274965138 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
UVM_INFO @ 274965138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 9 more failures.
Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 7 failures:
1.i2c_target_unexp_stop.51857418784792970069292337611171434150300767019885062629215262665256591973785
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
UVM_ERROR @ 245957469 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
UVM_INFO @ 245957469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.i2c_target_unexp_stop.27886931649820542736306770595693802991605557728510906199283229514581098212031
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_unexp_stop/latest/run.log
Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
UVM_ERROR @ 547097365 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
UVM_INFO @ 547097365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 5 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 6 failures:
5.i2c_host_mode_toggle.78653662770834377004769521942829759296433463634946477038556950748244239405322
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_mode_toggle/latest/run.log
UVM_FATAL @ 77147513 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x96d4ac94, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 77147513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
26.i2c_host_mode_toggle.115116133951944395258663999233936220480263355391463899198872830940775681178580
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/26.i2c_host_mode_toggle/latest/run.log
UVM_FATAL @ 274980365 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x51fd3a94, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 274980365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
Job timed out after * minutes has 3 failures:
7.i2c_host_stress_all.60781682283881370636830483856023437028344695351238441052439494799616576683435
Log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_stress_all/latest/run.log
Job timed out after 60 minutes
12.i2c_host_stress_all.46160744199880806814582333380075952038446195324350130613991574888526984748189
Log /nightly/current_run/scratch/master/i2c-sim-vcs/12.i2c_host_stress_all/latest/run.log
Job timed out after 60 minutes
... and 1 more failures.
Error-[CNST-CIF] Constraints inconsistency failure has 3 failures:
36.i2c_target_tx_stretch_ctrl.7250221463381614191660208809808857121934858964851326487842558910580632266105
Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_target_tx_stretch_ctrl/latest/run.log
Error-[CNST-CIF] Constraints inconsistency failure
src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
Constraints are inconsistent and cannot be solved.
Please check the inconsistent constraints being printed above and rewrite
them.
37.i2c_target_tx_stretch_ctrl.113470727516356146863542982725598739719191780382183965588913133227110437926260
Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/37.i2c_target_tx_stretch_ctrl/latest/run.log
Error-[CNST-CIF] Constraints inconsistency failure
src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
Constraints are inconsistent and cannot be solved.
Please check the inconsistent constraints being printed above and rewrite
them.
... and 1 more failures.
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:
0.i2c_target_glitch.87153088478349106142595477082174254555339085453734322907673271491334033270661
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log
UVM_ERROR @ 1019945481 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
UVM_INFO @ 1019945481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.i2c_target_glitch.52936587133952622197303155485060171812419062074876145068823166266612728624770
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log
UVM_ERROR @ 455424847 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
UVM_INFO @ 455424847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 2 failures:
2.i2c_target_stretch.23191304243692476646873537755739254512855378873104660437100916649164445861007
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stretch/latest/run.log
UVM_FATAL @ 10012886870 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
UVM_INFO @ 10012886870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.i2c_target_stretch.8923750895868267928431851240239701563868665362642917223009945322233439782095
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stretch/latest/run.log
UVM_FATAL @ 10046991930 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
UVM_INFO @ 10046991930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Error-[NOA] Null object access has 2 failures:
3.i2c_host_mode_toggle.41170913885365352021826759973761579264486793657947161727141985585179847030714
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_mode_toggle/latest/run.log
Error-[NOA] Null object access
src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
The object at dereference depth 0 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
35.i2c_host_mode_toggle.101855086519219321114977941319489653819131200775784214305805042465937296639223
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/35.i2c_host_mode_toggle/latest/run.log
Error-[NOA] Null object access
src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
The object at dereference depth 0 is being used before it was
constructed/allocated.
Please make sure that the object is allocated before using it.
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 1 failures:
19.i2c_target_intr_stress_wr.47227739062886634677826118082762639505266319140796566124277366704788319795156
Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/19.i2c_target_intr_stress_wr/latest/run.log
UVM_FATAL @ 31456044092 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
UVM_INFO @ 31456044092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
44.i2c_host_stress_all.104413060039794829553123292464654734553191714651238276889644839816704227611097
Line 151, in log /nightly/current_run/scratch/master/i2c-sim-vcs/44.i2c_host_stress_all/latest/run.log
UVM_ERROR @ 36394221121 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @1794797