KMAC/UNMASKED Simulation Results

Sunday October 19 2025 00:12:47 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 1.194m 4.111ms 50 50 100.00
V1 csr_hw_reset kmac_csr_hw_reset 1.660s 31.495us 5 5 100.00
V1 csr_rw kmac_csr_rw 1.860s 35.453us 20 20 100.00
V1 csr_bit_bash kmac_csr_bit_bash 12.600s 985.747us 5 5 100.00
V1 csr_aliasing kmac_csr_aliasing 7.970s 6.264ms 5 5 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 2.810s 264.035us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 1.860s 35.453us 20 20 100.00
kmac_csr_aliasing 7.970s 6.264ms 5 5 100.00
V1 mem_walk kmac_mem_walk 1.390s 84.558us 5 5 100.00
V1 mem_partial_access kmac_mem_partial_access 1.820s 37.779us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 long_msg_and_output kmac_long_msg_and_output 47.766m 113.916ms 50 50 100.00
V2 burst_write kmac_burst_write 15.484m 141.920ms 50 50 100.00
V2 test_vectors kmac_test_vectors_sha3_224 27.784m 59.347ms 5 5 100.00
kmac_test_vectors_sha3_256 27.777m 114.845ms 5 5 100.00
kmac_test_vectors_sha3_384 19.165m 44.862ms 5 5 100.00
kmac_test_vectors_sha3_512 15.090s 1.050ms 5 5 100.00
kmac_test_vectors_shake_128 34.002m 149.888ms 5 5 100.00
kmac_test_vectors_shake_256 30.974m 241.392ms 5 5 100.00
kmac_test_vectors_kmac 3.200s 111.149us 5 5 100.00
kmac_test_vectors_kmac_xof 3.400s 1.061ms 5 5 100.00
V2 sideload kmac_sideload 7.039m 19.796ms 50 50 100.00
V2 app kmac_app 6.207m 84.251ms 50 50 100.00
V2 app_with_partial_data kmac_app_with_partial_data 3.796m 49.357ms 10 10 100.00
V2 entropy_refresh kmac_entropy_refresh 4.954m 43.843ms 50 50 100.00
V2 error kmac_error 6.573m 38.066ms 50 50 100.00
V2 key_error kmac_key_error 17.690s 17.839ms 50 50 100.00
V2 sideload_invalid kmac_sideload_invalid 1.795m 10.070ms 37 50 74.00
V2 edn_timeout_error kmac_edn_timeout_error 44.030s 12.711ms 20 20 100.00
V2 entropy_mode_error kmac_entropy_mode_error 39.290s 15.576ms 20 20 100.00
V2 entropy_ready_error kmac_entropy_ready_error 1.042m 20.500ms 10 10 100.00
V2 lc_escalation kmac_lc_escalation 30.680s 3.015ms 50 50 100.00
V2 stress_all kmac_stress_all 32.980m 212.700ms 50 50 100.00
V2 intr_test kmac_intr_test 1.500s 49.447us 50 50 100.00
V2 alert_test kmac_alert_test 1.330s 681.650us 50 50 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 2.940s 351.836us 20 20 100.00
V2 tl_d_illegal_access kmac_tl_errors 2.940s 351.836us 20 20 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 1.660s 31.495us 5 5 100.00
kmac_csr_rw 1.860s 35.453us 20 20 100.00
kmac_csr_aliasing 7.970s 6.264ms 5 5 100.00
kmac_same_csr_outstanding 2.530s 442.707us 20 20 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 1.660s 31.495us 5 5 100.00
kmac_csr_rw 1.860s 35.453us 20 20 100.00
kmac_csr_aliasing 7.970s 6.264ms 5 5 100.00
kmac_same_csr_outstanding 2.530s 442.707us 20 20 100.00
V2 TOTAL 727 740 98.24
V2S shadow_reg_update_error kmac_shadow_reg_errors 2.480s 132.984us 20 20 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 2.480s 132.984us 20 20 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 2.480s 132.984us 20 20 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 2.480s 132.984us 20 20 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 4.580s 1.013ms 19 20 95.00
V2S tl_intg_err kmac_sec_cm 1.357m 4.982ms 5 5 100.00
kmac_tl_intg_err 3.840s 299.192us 20 20 100.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 3.840s 299.192us 20 20 100.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 30.680s 3.015ms 50 50 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 1.194m 4.111ms 50 50 100.00
V2S sec_cm_key_sideload kmac_sideload 7.039m 19.796ms 50 50 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 2.480s 132.984us 20 20 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 1.357m 4.982ms 5 5 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 1.357m 4.982ms 5 5 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 1.357m 4.982ms 5 5 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 1.194m 4.111ms 50 50 100.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 30.680s 3.015ms 50 50 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 1.357m 4.982ms 5 5 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 4.020m 4.009ms 10 10 100.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 1.194m 4.111ms 50 50 100.00
V2S TOTAL 74 75 98.67
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 6.035m 6.190ms 8 10 80.00
V3 TOTAL 8 10 80.00
TOTAL 924 940 98.30

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.56 97.69 94.44 100.00 72.73 96.04 97.74 96.26

Failure Buckets