AON_TIMER Simulation Results

Sunday October 26 2025 00:06:53 UTC

GitHub Revision: 06d697f

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.620s	624.691us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.090s	756.982us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.540s	524.378us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	23.430s	13.646ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	1.950s	413.246us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	1.560s	376.762us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.540s	524.378us	20	20	100.00
		aon_timer_csr_aliasing	1.950s	413.246us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.460s	495.697us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.700s	272.532us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	50.980s	61.961ms	15	15	100.00
V2	jump	aon_timer_jump	2.010s	747.420us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.933m	78.583ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	1.790s	444.338us	50	50	100.00
V2	intr_test	aon_timer_intr_test	1.770s	419.418us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	2.740s	963.388us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	2.740s	963.388us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.090s	756.982us	5	5	100.00
		aon_timer_csr_rw	1.540s	524.378us	20	20	100.00
		aon_timer_csr_aliasing	1.950s	413.246us	5	5	100.00
		aon_timer_same_csr_outstanding	4.450s	2.676ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.090s	756.982us	5	5	100.00
		aon_timer_csr_rw	1.540s	524.378us	20	20	100.00
		aon_timer_csr_aliasing	1.950s	413.246us	5	5	100.00
		aon_timer_same_csr_outstanding	4.450s	2.676ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	10.140s	7.859ms	5	5	100.00
		aon_timer_tl_intg_err	11.020s	8.451ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	11.020s	8.451ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.990s	481.643us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.270s	563.559us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	11.750s	3.619ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.320s	610.230us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	18.350s	4.257ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	30.370s	5.471ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00