| V1 |
smoke |
aon_timer_smoke |
1.510s |
688.303us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.520s |
1.151ms |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.420s |
444.405us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
13.280s |
13.842ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.520s |
509.202us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.470s |
459.947us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.420s |
444.405us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
509.202us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.720s |
492.146us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.930s |
516.358us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.096m |
62.166ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.810s |
695.606us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.410m |
70.390ms |
15 |
15 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.990s |
490.596us |
50 |
50 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.330s |
350.860us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.700s |
442.372us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.700s |
442.372us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.520s |
1.151ms |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.420s |
444.405us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
509.202us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.660s |
2.606ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.520s |
1.151ms |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.420s |
444.405us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
509.202us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.660s |
2.606ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
175 |
175 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
12.130s |
7.739ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
12.590s |
8.416ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
12.590s |
8.416ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.660s |
666.705us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.750s |
519.216us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
7.750s |
3.923ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.330s |
637.274us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.300s |
4.098ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
33.850s |
29.103ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |