I2C Simulation Results

Sunday November 09 2025 00:10:08 UTC

GitHub Revision: `35f91f3`

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	1.496m	2.098ms	50	50	100.00
V1	target_smoke	i2c_target_smoke	34.650s	2.440ms	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.200s	27.632us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.080s	41.778us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	4.740s	217.357us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.210s	91.933us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.710s	31.302us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.080s	41.778us	20	20	100.00
		i2c_csr_aliasing	2.210s	91.933us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	6.450s	1.312ms	2	50	4.00
V2	host_stress_all	i2c_host_stress_all	23.411m	81.804ms	6	50	12.00
V2	host_maxperf	i2c_host_perf	22.942m	18.474ms	50	50	100.00
V2	host_override	i2c_host_override	1.080s	27.036us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	4.528m	5.550ms	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	2.304m	10.792ms	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.820s	132.937us	50	50	100.00
		i2c_host_fifo_fmt_empty	21.350s	594.483us	50	50	100.00
		i2c_host_fifo_reset_rx	12.570s	978.483us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	2.986m	50.813ms	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	47.050s	1.078ms	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.340s	556.500us	16	50	32.00
V2	target_glitch	i2c_target_glitch	3.770s	458.511us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	14.250m	53.496ms	47	50	94.00
V2	target_maxperf	i2c_target_perf	9.080s	922.024us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	1.062m	11.806ms	50	50	100.00
		i2c_target_intr_smoke	9.710s	15.965ms	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.210s	263.022us	50	50	100.00
		i2c_target_fifo_reset_tx	2.350s	667.407us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	19.072m	58.580ms	50	50	100.00
		i2c_target_stress_rd	1.062m	11.806ms	50	50	100.00
		i2c_target_intr_stress_wr	2.821m	14.519ms	50	50	100.00
V2	target_timeout	i2c_target_timeout	10.700s	2.765ms	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	1.784m	2.983ms	45	50	90.00
V2	bad_address	i2c_target_bad_addr	8.810s	4.818ms	48	50	96.00
V2	target_mode_glitch	i2c_target_hrst	39.230s	10.263ms	28	50	56.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.490s	2.435ms	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.100s	677.212us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	22.942m	18.474ms	50	50	100.00
		i2c_host_perf_precise	7.016m	23.196ms	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	47.050s	1.078ms	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	34.020s	2.059ms	49	50	98.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	4.390s	2.379ms	50	50	100.00
		i2c_target_nack_acqfull_addr	4.260s	512.213us	50	50	100.00
		i2c_target_nack_txstretch	2.390s	592.342us	35	50	70.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	23.070s	2.892ms	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.720s	492.080us	50	50	100.00
V2	alert_test	i2c_alert_test	1.010s	16.047us	50	50	100.00
V2	intr_test	i2c_intr_test	1.010s	41.331us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	3.390s	145.408us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	3.390s	145.408us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.200s	27.632us	5	5	100.00
		i2c_csr_rw	1.080s	41.778us	20	20	100.00
		i2c_csr_aliasing	2.210s	91.933us	5	5	100.00
		i2c_same_csr_outstanding	1.570s	261.492us	18	20	90.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.200s	27.632us	5	5	100.00
		i2c_csr_rw	1.080s	41.778us	20	20	100.00
		i2c_csr_aliasing	2.210s	91.933us	5	5	100.00
		i2c_same_csr_outstanding	1.570s	261.492us	18	20	90.00
V2		TOTAL			1614	1792	90.07
V2S	tl_intg_err	i2c_tl_intg_err	2.840s	361.286us	20	20	100.00
		i2c_sec_cm	1.500s	262.165us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.840s	361.286us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	31.670s	2.707ms	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	3.980s	2.013ms	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	24.570s	1.792ms	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1794	2042	87.86

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 98 failures:

Test i2c_host_error_intr has 46 failures.

0.i2c_host_error_intr.17989663615528840694374706134692303116880600601044119478517832609914019260453
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @   4814419 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   4814419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.100372502742713119816645933535298682589261095783810309708012014307225416732882
Line 107, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 346124128 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 346124128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 44 more failures.

Test i2c_host_stress_all has 36 failures.

0.i2c_host_stress_all.38122450291675457510853072953069427520386298975780128917837697020121269394888
Line 155, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 30579389344 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 30579389344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_host_stress_all.39829788786655657740666672379996814798797977697082413144422064222936524348306
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_stress_all/latest/run.log

  UVM_ERROR @  15414939 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  15414939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 34 more failures.

Test i2c_target_stress_all_with_rand_reset has 5 failures.

1.i2c_target_stress_all_with_rand_reset.56653012798256678067524628078801554805456980520522953899071330892261623819548
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  47324384 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  47324384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_target_stress_all_with_rand_reset.115044956725306529026280276337100619281450931292145230092403204506496789994474
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 645397098 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 645397098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

Test i2c_host_mode_toggle has 11 failures.

2.i2c_host_mode_toggle.61522291517620984342886687807415375577723590546757706142247483972536604907310
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  15545593 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  15545593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_host_mode_toggle.76738521315086799168147366545126536683361095290019902250314554885855384259368
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @   3859418 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   3859418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 9 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 26 failures:
- Test i2c_target_unexp_stop has 26 failures.
  - 0.i2c_target_unexp_stop.107907923334388000627698409501919181913213808151071579149839563374807197616155
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 538051379 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 189 [0xbd])
  UVM_INFO @ 538051379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_unexp_stop.91395817968727393611219087316799054710180125748177085733298177134271779325051
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 114628442 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 17 [0x11])
  UVM_INFO @ 114628442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 24 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 22 failures:
- Test i2c_target_hrst has 22 failures.
  - 4.i2c_target_hrst.98118282854566748344616804462872824718906110484907145924578980636656677486766
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10262856329 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10262856329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 8.i2c_target_hrst.15267167130183890421783821600879989794293992951743137810294927381942696936651
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10303298645 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10303298645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 20 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 15 failures:
- Test i2c_target_nack_txstretch has 15 failures.
  - 8.i2c_target_nack_txstretch.54142360683786404588147627247023221431484791038784245507018927898861667223979
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 321999479 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 321999479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 9.i2c_target_nack_txstretch.18962547479109235441274559617210789284056417655628179130709982324303929369591
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 270525862 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 270525862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 13 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 14 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.33087882570264527063282910556811354806719630208633507162236662263975962144478
Line 88, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1781716342 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1781716342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.80432699088211274343274865471049268881164671267931725967562633372461046411673
Line 85, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 973810582 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 973810582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

0.i2c_target_stress_all_with_rand_reset.16976492831174405838624431708744107541497950152641428098170182269539089718573
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 690756851 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 690756851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_target_stress_all_with_rand_reset.52346476672694434643293046805438603422968772885559149929946045287646638984371
Line 85, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 699441897 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 699441897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 14 failures:
- Test i2c_target_unexp_stop has 14 failures.
  - 3.i2c_target_unexp_stop.1144691011897313944579942512646223149765859656598656335643210305462792457242
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 157145536 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 157145536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 7.i2c_target_unexp_stop.79161069797278259082788966774003257595932143891691542264727419511758012830271
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  86597234 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @  86597234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 12 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 12 failures:

Test i2c_host_mode_toggle has 6 failures.

0.i2c_host_mode_toggle.36465422723871169366620348011576838966844703820982276736554494584362363291218
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 391238609 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @75534

11.i2c_host_mode_toggle.70625695817203339706851705684950111961123225275699445876557492136269491009866
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 288850495 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @12440

... and 4 more failures.

Test i2c_host_stress_all has 6 failures.

7.i2c_host_stress_all.80204635409741526648307158184796039315396855004435192327741304646582694883218
Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 52969276421 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @5993559

12.i2c_host_stress_all.83672687893422340121527302523669743792831773274537729322062275963897067521593
Line 153, in log /nightly/current_run/scratch/master/i2c-sim-vcs/12.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 169649665215 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3277569

... and 4 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 10 failures:

Test i2c_target_unexp_stop has 10 failures.

4.i2c_target_unexp_stop.89084491505579996031140094734938521177490736265866083179797378677468316816642
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @  99652814 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @  99652814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_target_unexp_stop.58000803303684321094437179107407979168125437327791044628790582213596127432413
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 597363528 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 597363528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 10 failures:

Test i2c_host_mode_toggle has 10 failures.

7.i2c_host_mode_toggle.95879955232611417533365148948312141524389472948325226760376063337036474524520
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  87455291 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

9.i2c_host_mode_toggle.33919731794652682257736952514420834906103411678749585842802341832361764178557
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 556500458 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 8 more failures.

UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 6 failures:
- Test i2c_host_mode_toggle has 6 failures.
  - 18.i2c_host_mode_toggle.21647461295465789447516639831653673693533061058386697119424533400479796160339
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  80989891 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x94036214, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  80989891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 25.i2c_host_mode_toggle.93504332406618789634250193552684677465829723041377349300070162978518251125059
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/25.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 200740254 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x9eb6d494, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 200740254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 4 more failures.
UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 5 failures:
- Test i2c_target_stretch has 5 failures.
  - 0.i2c_target_stretch.83315667091356554009168761546254900482705409826359037705810902200003511577851
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10010787937 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10010787937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 12.i2c_target_stretch.98669339115120517235994483939152813631151044787949599747709297959558303654416
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/12.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10023135697 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10023135697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 3 more failures.
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 3 failures:
- Test i2c_target_stress_all has 3 failures.
  - 0.i2c_target_stress_all.50750559856098272421445914804406824930470934747738381391481728804257922244475
    Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 49856295694 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 49856295694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 36.i2c_target_stress_all.48857034884491946822526771771081139812266983365424058450172360687948006857797
    Line 90, in log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 43832347005 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 43832347005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.15267817647823994086092286334395485684532368748038150404527502941887563318502
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 458511234 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 458511234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.50603797442256931899878889268412214382876177836653609018669719656171628725667
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 1751754196 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 1751754196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (cip_base_vseq.sv:840) [i2c_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 2 failures:
- Test i2c_same_csr_outstanding has 2 failures.
  - 2.i2c_same_csr_outstanding.113843058775520531579949745105296359006214487785511237614885631994598198538440
    Line 74, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  22045546 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed data & ~ro_mask == 0 (64 [0x40] vs 0 [0x0])
  UVM_INFO @  22045546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 8.i2c_same_csr_outstanding.54414317824512486004429977189476769742009651314864884830633022619744286930121
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  73267202 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed data & ~ro_mask == 0 (64 [0x40] vs 0 [0x0])
  UVM_INFO @  73267202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Job timed out after * minutes has 2 failures:
- Test i2c_host_error_intr has 1 failures.
  - 17.i2c_host_error_intr.38739718087003790069695278550659617951064541120194863406222541343400573144134
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/17.i2c_host_error_intr/latest/run.log
```
  Job timed out after 60 minutes
```
- Test i2c_host_stress_all has 1 failures.
  - 25.i2c_host_stress_all.3070039476203152738591745629950642862827784086150046992841631544748169311617
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/25.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 2 failures:
- Test i2c_target_bad_addr has 2 failures.
  - 26.i2c_target_bad_addr.13677820555855437891773944541168397914670812079246549318722785550330334776524
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/26.i2c_target_bad_addr/latest/run.log
```
  UVM_FATAL @ 20000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 20000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 20000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 44.i2c_target_bad_addr.111151086565712064179066650150320405165638933592372541640055975595053477540713
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/44.i2c_target_bad_addr/latest/run.log
```
  UVM_FATAL @ 20000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 20000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 20000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[CNST-CIF] Constraints inconsistency failure has 1 failures:
- Test i2c_target_tx_stretch_ctrl has 1 failures.
  - 1.i2c_target_tx_stretch_ctrl.86514268679751395954169058157959011713093769843811500473298503204041650748606
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
UVM_ERROR (cip_base_vseq.sv:1142) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. has 1 failures:
- Test i2c_target_stress_all_with_rand_reset has 1 failures.
  - 6.i2c_target_stress_all_with_rand_reset.19922728402125110558081797986968477948519525797039240187626339512509069433050
    Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 943504547 ps: (cip_base_vseq.sv:1142) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
  UVM_INFO @ 943504547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 15.i2c_host_stress_all.94925325232995910661347674541718453252946157124039440059871372685878396286077
    Line 159, in log /nightly/current_run/scratch/master/i2c-sim-vcs/15.i2c_host_stress_all/latest/run.log
```
  UVM_ERROR @ 178405106042 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @20157549
```
UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpWrite has 1 failures:
- Test i2c_host_error_intr has 1 failures.
  - 29.i2c_host_error_intr.91088890035761442473854824416125168433220210315090123016244543553147795699849
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/29.i2c_host_error_intr/latest/run.log
```
  UVM_ERROR @   5574589 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpWrite
  --> EXP:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 38.i2c_host_mode_toggle.21163510043615522485273976442100164657439977516652972533982226463185854777705
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/38.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```