35f91f3| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 57.700s | 3.088ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.520s | 152.245us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 1.510s | 33.549us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 14.880s | 290.678us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 7.650s | 136.832us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 3.120s | 347.079us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 1.510s | 33.549us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 7.650s | 136.832us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 1.080s | 28.473us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.920s | 128.191us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 58.955m | 895.368ms | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 13.082m | 156.645ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 34.269m | 1.331s | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 36.022m | 601.152ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 21.469m | 186.215ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 15.556m | 34.210ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 33.035m | 287.465ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 5.649m | 15.524ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 3.080s | 437.800us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 3.140s | 190.361us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 7.373m | 114.981ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 6.313m | 73.671ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 3.684m | 100.237ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 5.343m | 30.833ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 5.681m | 13.595ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 12.680s | 2.157ms | 50 | 50 | 100.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 2.344m | 10.007ms | 36 | 50 | 72.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 41.390s | 4.225ms | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 34.560s | 8.690ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 1.023m | 6.502ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 24.350s | 2.616ms | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 30.229m | 58.963ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 1.150s | 73.668us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 1.220s | 26.373us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 4.190s | 1.066ms | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 4.190s | 1.066ms | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.520s | 152.245us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.510s | 33.549us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 7.650s | 136.832us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.040s | 463.482us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.520s | 152.245us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.510s | 33.549us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 7.650s | 136.832us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.040s | 463.482us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 726 | 740 | 98.11 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 2.910s | 116.594us | 20 | 20 | 100.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 2.910s | 116.594us | 20 | 20 | 100.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 2.910s | 116.594us | 20 | 20 | 100.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 2.910s | 116.594us | 20 | 20 | 100.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 5.700s | 302.791us | 20 | 20 | 100.00 |
| V2S | tl_intg_err | kmac_sec_cm | 1.415m | 53.853ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 5.390s | 206.544us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 5.390s | 206.544us | 20 | 20 | 100.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 24.350s | 2.616ms | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 57.700s | 3.088ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 7.373m | 114.981ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 2.910s | 116.594us | 20 | 20 | 100.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 1.415m | 53.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 1.415m | 53.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 1.415m | 53.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 57.700s | 3.088ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 24.350s | 2.616ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 1.415m | 53.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 4.431m | 20.791ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 57.700s | 3.088ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 75 | 75 | 100.00 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 4.285m | 11.031ms | 8 | 10 | 80.00 |
| V3 | TOTAL | 8 | 10 | 80.00 | |||
| TOTAL | 924 | 940 | 98.30 |
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 3 failures:
12.kmac_sideload_invalid.80491869031401734100891588729366966371340114384594979897375279799673118086844
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/12.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10117290433 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x257b2000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10117290433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
21.kmac_sideload_invalid.40168398284628052795365915260494953468331167496166983449626791958047120358597
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/21.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10019654787 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc7a7b000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10019654787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) has 2 failures:
22.kmac_sideload_invalid.50185442136702837118560947891146310934791721734293538605551894820298075737083
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/22.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10221450814 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x17bfe000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
UVM_INFO @ 10221450814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
37.kmac_sideload_invalid.98393775852276774636851049094247570302334056593826945619177589539952073629860
Line 85, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/37.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10062232146 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4cfab000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
UVM_INFO @ 10062232146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1229) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 1 failures:
3.kmac_stress_all_with_rand_reset.13691417188611377729679533275133304445579803736879698130685327562006834178897
Line 306, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 8694674265 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 8694674265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:840) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
8.kmac_stress_all_with_rand_reset.102008345824217486669611632660753844956422078526913995428176246906382777276393
Line 211, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1933159926 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 1933159926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16) has 1 failures:
9.kmac_sideload_invalid.22377061468890798006908602968603527206097323977612645201461412562519666591791
Line 91, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10457591968 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xea52a000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)
UVM_INFO @ 10457591968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=18) has 1 failures:
10.kmac_sideload_invalid.10803747891388698749982870851070732356528273528377377054067287334757531320008
Line 94, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/10.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 11206078628 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x41a59000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)
UVM_INFO @ 11206078628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:
19.kmac_sideload_invalid.113281214658212378282731675123758121719398927635850604472479321647832532352884
Line 77, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/19.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10033727642 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x2b0e2000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10033727642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
24.kmac_sideload_invalid.19225015172924249870480035857182394275650340671221103430000681785961928407508
Line 80, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/24.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10196078890 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd2c6c000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10196078890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) has 1 failures:
28.kmac_sideload_invalid.83609111292689596318349042440764635316765847417070982218974131279150449431658
Line 85, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/28.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10233701894 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x260ac000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
UVM_INFO @ 10233701894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17) has 1 failures:
35.kmac_sideload_invalid.51985450061060507709616884114783969958018432926915569330611077872353528879746
Line 94, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/35.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10095286509 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5542a000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)
UVM_INFO @ 10095286509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=13) has 1 failures:
40.kmac_sideload_invalid.78210631628268586998821944782659485275582314764258395336910763324929749228969
Line 88, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/40.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 11098876745 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x954ed000, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
UVM_INFO @ 11098876745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 1 failures:
46.kmac_sideload_invalid.11104836384732434869505032469509398307814181334040586154619386671215714068352
Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/46.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10063172931 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6dcc3000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10063172931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 1 failures:
49.kmac_sideload_invalid.18557571749447419108810684751141333898458736797985736083846995629332915598332
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10071854570 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x45eb2000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10071854570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---