| V1 |
smoke |
aon_timer_smoke |
1.610s |
729.981us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.250s |
1136.550us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.440s |
393.597us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
21.170s |
13697.271us |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.670s |
632.482us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.720s |
442.285us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.440s |
393.597us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.670s |
632.482us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.420s |
330.191us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.220s |
427.226us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
74.080s |
62096.240us |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.660s |
541.897us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
156.370s |
104973.359us |
15 |
15 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
2.150s |
516.568us |
50 |
50 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.720s |
499.893us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.520s |
459.666us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.520s |
459.666us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.250s |
1136.550us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.440s |
393.597us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.670s |
632.482us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2552.405us |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.250s |
1136.550us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.440s |
393.597us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.670s |
632.482us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2552.405us |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
175 |
175 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
10.010s |
7739.881us |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
10.990s |
8160.002us |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
10.990s |
8160.002us |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.680s |
698.851us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.650s |
497.276us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
4.550s |
3629.106us |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.270s |
686.881us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
18.270s |
4190.911us |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
31.430s |
53873.483us |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |