I2C Simulation Results

Sunday November 23 2025 00:12:22 UTC

GitHub Revision: `1f7db17`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	104.200s	15268.483us	50	50	100.00
V1	target_smoke	i2c_target_smoke	36.610s	2542.515us	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.170s	23.038us	5	5	100.00
V1	csr_rw	i2c_csr_rw	2.320s	549.341us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	4.360s	1369.009us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.290s	1745.946us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.750s	29.646us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	2.320s	549.341us	20	20	100.00
		i2c_csr_aliasing	2.290s	1745.946us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	2.970s	823.628us	0	50	0.00
V2	host_stress_all	i2c_host_stress_all	998.260s	60866.049us	7	50	14.00
V2	host_maxperf	i2c_host_perf	1687.600s	49453.673us	50	50	100.00
V2	host_override	i2c_host_override	1.100s	16.544us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	323.690s	10337.430us	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	137.280s	9586.201us	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.690s	2013.111us	50	50	100.00
		i2c_host_fifo_fmt_empty	25.870s	1353.443us	50	50	100.00
		i2c_host_fifo_reset_rx	12.060s	482.273us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	201.080s	41863.201us	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	31.240s	5307.489us	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.210s	582.806us	15	50	30.00
V2	target_glitch	i2c_target_glitch	4.750s	555.971us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	633.110s	73384.592us	49	50	98.00
V2	target_maxperf	i2c_target_perf	7.820s	3296.107us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	77.650s	6810.106us	50	50	100.00
		i2c_target_intr_smoke	10.700s	2931.876us	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.430s	266.696us	50	50	100.00
		i2c_target_fifo_reset_tx	3.470s	363.872us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	1173.690s	63519.435us	50	50	100.00
		i2c_target_stress_rd	77.650s	6810.106us	50	50	100.00
		i2c_target_intr_stress_wr	281.330s	21633.441us	48	50	96.00
V2	target_timeout	i2c_target_timeout	10.150s	2928.435us	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	99.950s	2492.009us	41	50	82.00
V2	bad_address	i2c_target_bad_addr	9.930s	20000.000us	49	50	98.00
V2	target_mode_glitch	i2c_target_hrst	34.000s	10004.901us	24	50	48.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.220s	2431.306us	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.100s	148.571us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	1687.600s	49453.673us	50	50	100.00
		i2c_host_perf_precise	751.630s	23218.841us	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	31.240s	5307.489us	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	15.210s	1682.208us	48	50	96.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	4.330s	2426.318us	50	50	100.00
		i2c_target_nack_acqfull_addr	3.820s	1053.629us	50	50	100.00
		i2c_target_nack_txstretch	2.280s	747.217us	30	50	60.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	25.690s	4475.092us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.920s	1043.311us	50	50	100.00
V2	alert_test	i2c_alert_test	1.020s	16.968us	50	50	100.00
V2	intr_test	i2c_intr_test	1.120s	18.190us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.730s	243.062us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.730s	243.062us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.170s	23.038us	5	5	100.00
		i2c_csr_rw	2.320s	549.341us	20	20	100.00
		i2c_csr_aliasing	2.290s	1745.946us	5	5	100.00
		i2c_same_csr_outstanding	1.710s	29.748us	20	20	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.170s	23.038us	5	5	100.00
		i2c_csr_rw	2.320s	549.341us	20	20	100.00
		i2c_csr_aliasing	2.290s	1745.946us	5	5	100.00
		i2c_same_csr_outstanding	1.710s	29.748us	20	20	100.00
V2		TOTAL			1601	1792	89.34
V2S	tl_intg_err	i2c_tl_intg_err	2.780s	507.994us	20	20	100.00
		i2c_sec_cm	1.460s	143.372us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.780s	507.994us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	42.730s	3232.490us	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	2.580s	564.139us	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	33.940s	2206.002us	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1781	2042	87.22

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
85.87	97.13	88.61	89.66	46.43	93.54	96.41	89.32

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 95 failures:

Test i2c_host_error_intr has 50 failures.

0.i2c_host_error_intr.104348319090250375123326792160319771571244812148480319652739287555233996611356
Line 131, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 345382422 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 345382422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.88838706221438573650306917491405546974532927766399975108411694791522299286457
Line 99, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 196066232 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 196066232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 48 more failures.

Test i2c_host_stress_all has 31 failures.

1.i2c_host_stress_all.34369918881801416662833008928519866306661662287261436878393972730257246738601
Line 112, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 30072742714 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 30072742714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_host_stress_all.37271229916651680551561492029686955945794527718452534827288665893096969568160
Line 96, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 4514469129 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 4514469129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 29 more failures.

Test i2c_target_stress_all_with_rand_reset has 5 failures.

1.i2c_target_stress_all_with_rand_reset.11903064283228308632610572185284017284168930316078765203617108543050380267281
Line 102, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1022590169 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 1022590169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_target_stress_all_with_rand_reset.92398345228760647064584963561576782913012177248698862842809337758442791544277
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  80805444 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  80805444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

Test i2c_host_mode_toggle has 9 failures.

6.i2c_host_mode_toggle.50827248421549799612681304325601205967531703551015575679627956834824973371222
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  48848471 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  48848471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

10.i2c_host_mode_toggle.21155771899571845372604675712419723536758708345664556464609504214088735922273
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  49371965 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  49371965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 7 more failures.

UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 26 failures:
- Test i2c_target_hrst has 26 failures.
  - 0.i2c_target_hrst.27889047865665950493544450190199112888396027831671526660079022819490544257115
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10325390226 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10325390226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_hrst.92653758314575849672056644641713526331644456121938388339348895044894183536272
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10448192860 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10448192860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 24 more failures.
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 22 failures:
- Test i2c_target_unexp_stop has 22 failures.
  - 0.i2c_target_unexp_stop.75201563232917781976968616712008531632918448992296880461208719835424212364394
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 440795912 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 78 [0x4e])
  UVM_INFO @ 440795912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_unexp_stop.91490332697231587469221657103588233184026096085633889035046559112883734045699
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 127209437 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 249 [0xf9])
  UVM_INFO @ 127209437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 20 more failures.
UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 20 failures:
- Test i2c_target_unexp_stop has 20 failures.
  - 1.i2c_target_unexp_stop.15543905657973922072427679788925160786022171969700570150902749827628766481612
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 134211304 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 134211304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_unexp_stop.53186268646432189254974279309460166219126442204979854432656937743235387569958
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 133125504 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 133125504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 18 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 20 failures:
- Test i2c_target_nack_txstretch has 20 failures.
  - 1.i2c_target_nack_txstretch.62044734664889609879520396136788763382581827487185099434060084613627376929841
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 753804598 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 753804598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 7.i2c_target_nack_txstretch.63685351590266773663386928795214239159699655682727685318116323744783556546141
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 985154168 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 985154168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 18 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 17 failures:

Test i2c_host_mode_toggle has 10 failures.

5.i2c_host_mode_toggle.19784412705601608659231781172371677896800805508915752094315760225331192318372
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 553135417 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @48056

7.i2c_host_mode_toggle.718359812812247466003202635194665250532818495732094017949026773835934183057
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 504940779 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @19568

... and 8 more failures.

Test i2c_host_stress_all has 7 failures.

12.i2c_host_stress_all.96273395205126376408432097322668448617544647955050627571752691887689930100421
Line 197, in log /nightly/current_run/scratch/master/i2c-sim-vcs/12.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 15559766609 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2551429

20.i2c_host_stress_all.44250351430374794638503016405186084617595173921017955941428829273506634068649
Line 131, in log /nightly/current_run/scratch/master/i2c-sim-vcs/20.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 35623293770 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2739165

... and 5 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 15 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.89446457455404721675547342308130791573964442379068053603394559934330194868767
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 110617593 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 110617593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.61662081477250373109515911311001662006221366674355774417371333948818665818893
Line 111, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1940701088 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1940701088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 5 failures.

0.i2c_target_stress_all_with_rand_reset.82095018960584606014133510193454169110209970304589014951900789839619952289045
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 842890953 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 842890953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.i2c_target_stress_all_with_rand_reset.114010149513608958443287605314921626133008142295969179062099645578083133322993
Line 85, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 900377683 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 900377683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 12 failures:

Test i2c_host_mode_toggle has 12 failures.

3.i2c_host_mode_toggle.60626422814509147098901745487861818675190868917378119261704017272673403803594
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  48435597 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

4.i2c_host_mode_toggle.91890444654853449882636740059264645817741272368015933829853905483869150218723
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  44323130 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 10 more failures.

UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 9 failures:
- Test i2c_target_stretch has 9 failures.
  - 1.i2c_target_stretch.59937409026011505721557284732547452751575335545216408069256756167632150689208
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10002337468 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10002337468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_stretch.86964278336614151720382812447147880501123107186528710786647407073840972701490
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10001297748 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10001297748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 7 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 8 failures:

Test i2c_target_unexp_stop has 8 failures.

5.i2c_target_unexp_stop.111152440580749824509657809557614416321363236500994081369001275092631558153210
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 472152377 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 472152377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_target_unexp_stop.114588308367898074567857203946168561820304301626156649231011065720792103178877
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 2071612084 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 2071612084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

Job timed out after * minutes has 3 failures:
- Test i2c_host_stress_all has 3 failures.
  - 0.i2c_host_stress_all.63481885038122224133884619691021043023299772271065057469224843051537618268428
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - 22.i2c_host_stress_all.3941092697082702057373053696707296913888876632763603549624488510658755944057
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/22.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - ... and 1 more failures.
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 3 failures:
- Test i2c_target_stress_all has 1 failures.
  - 3.i2c_target_stress_all.65548158914272649929203525175372310494768720507311411423861659269578053509297
    Line 106, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 50028027437 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 50028027437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
- Test i2c_target_intr_stress_wr has 2 failures.
  - 38.i2c_target_intr_stress_wr.92770238480413531033856106099852788655219240075930297768065363265580149530153
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/38.i2c_target_intr_stress_wr/latest/run.log
```
  UVM_FATAL @ 19894091139 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 19894091139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 48.i2c_target_intr_stress_wr.1219416884021155017432313108376128800912354525054855041600410877378972262224
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/48.i2c_target_intr_stress_wr/latest/run.log
```
  UVM_FATAL @ 51660932325 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 51660932325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 3 failures:
- Test i2c_host_mode_toggle has 3 failures.
  - 27.i2c_host_mode_toggle.95156216396381128246283299048836183103495002018212044919377005542218602281351
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/27.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 229878663 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x491e8d14, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 229878663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 30.i2c_host_mode_toggle.110351268855070957428671025904642475430551993206351842895263704659712655911116
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/30.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 220865487 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xbbbd2694, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 220865487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.97733924234623264857181573659581962198698898539807668342816618583974663997925
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 555971114 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 555971114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.76670419163246959810957462845493593861544171064552192983672797629013432981437
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 2073491242 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 2073491242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 2 failures:
- Test i2c_target_bad_addr has 1 failures.
  - 0.i2c_target_bad_addr.16812127715217551166038019640877212612310713954629929836800613549793860553010
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_bad_addr/latest/run.log
```
  UVM_FATAL @ 20000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 20000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 20000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
- Test i2c_host_stress_all has 1 failures.
  - 25.i2c_host_stress_all.71811907199474945981779687953126259935299244781306899056493588423214749457277
    Line 92, in log /nightly/current_run/scratch/master/i2c-sim-vcs/25.i2c_host_stress_all/latest/run.log
```
  UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[CNST-CIF] Constraints inconsistency failure has 2 failures:
- Test i2c_target_tx_stretch_ctrl has 2 failures.
  - 23.i2c_target_tx_stretch_ctrl.62101862748699803287743491831959551014693887143164735578397651469373705708905
    Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/23.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 45.i2c_target_tx_stretch_ctrl.44505546923784026019119110961776440948935668929217561174417745745288912759523
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/45.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 14.i2c_host_mode_toggle.63321453666091352048123592156218475385862790326688260014226390092373238974824
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/14.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 32.i2c_host_stress_all.90476730762710611057038984843226714274350899184456781931375529851655629568688
    Line 141, in log /nightly/current_run/scratch/master/i2c-sim-vcs/32.i2c_host_stress_all/latest/run.log
```
  UVM_ERROR @ 11938253675 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3614261
```