AON_TIMER Simulation Results

Sunday November 30 2025 00:07:20 UTC

GitHub Revision: c766185

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.640s	708.328us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.500s	1225.908us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.390s	525.686us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	18.430s	14029.670us	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	1.580s	586.054us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	1.550s	503.712us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.390s	525.686us	20	20	100.00
		aon_timer_csr_aliasing	1.580s	586.054us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.580s	443.609us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.240s	466.719us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	77.280s	62134.181us	15	15	100.00
V2	jump	aon_timer_jump	1.410s	674.343us	5	5	100.00
V2	stress_all	aon_timer_stress_all	208.700s	136324.610us	15	15	100.00
V2	alert_test	aon_timer_alert_test	1.490s	421.235us	50	50	100.00
V2	intr_test	aon_timer_intr_test	1.430s	520.458us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	2.820s	446.535us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	2.820s	446.535us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.500s	1225.908us	5	5	100.00
		aon_timer_csr_rw	1.390s	525.686us	20	20	100.00
		aon_timer_csr_aliasing	1.580s	586.054us	5	5	100.00
		aon_timer_same_csr_outstanding	4.740s	2490.556us	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.500s	1225.908us	5	5	100.00
		aon_timer_csr_rw	1.390s	525.686us	20	20	100.00
		aon_timer_csr_aliasing	1.580s	586.054us	5	5	100.00
		aon_timer_same_csr_outstanding	4.740s	2490.556us	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.630s	8071.491us	5	5	100.00
		aon_timer_tl_intg_err	14.150s	7959.222us	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	14.150s	7959.222us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.500s	590.185us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	1.630s	652.363us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	8.190s	3685.196us	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	1.560s	578.993us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	15.850s	4271.751us	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	36.630s	29110.000us	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.65	99.09	99.05	98.53	--	98.56	96.67	100.00