AON_TIMER Simulation Results

Sunday December 07 2025 00:12:41 UTC

GitHub Revision: 9ce72b8

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.380s	664.439us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.990s	891.939us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.200s	513.870us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	20.590s	9761.050us	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.020s	495.124us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.070s	400.675us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.200s	513.870us	20	20	100.00
		aon_timer_csr_aliasing	2.020s	495.124us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.380s	285.713us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.450s	300.341us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	58.670s	41544.766us	15	15	100.00
V2	jump	aon_timer_jump	1.870s	534.421us	5	5	100.00
V2	stress_all	aon_timer_stress_all	145.350s	88412.849us	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.070s	513.016us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.130s	493.108us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.330s	498.965us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.330s	498.965us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.990s	891.939us	5	5	100.00
		aon_timer_csr_rw	2.200s	513.870us	20	20	100.00
		aon_timer_csr_aliasing	2.020s	495.124us	5	5	100.00
		aon_timer_same_csr_outstanding	5.890s	2111.096us	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.990s	891.939us	5	5	100.00
		aon_timer_csr_rw	2.200s	513.870us	20	20	100.00
		aon_timer_csr_aliasing	2.020s	495.124us	5	5	100.00
		aon_timer_same_csr_outstanding	5.890s	2111.096us	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_tl_intg_err	17.250s	7922.352us	20	20	100.00
		aon_timer_sec_cm	19.780s	7443.365us	5	5	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	17.250s	7922.352us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.320s	632.350us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.590s	702.897us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	13.610s	3905.638us	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.630s	695.827us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	20.430s	4220.332us	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	73.840s	13893.160us	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.65	99.09	99.05	98.53	--	98.56	96.67	100.00