I2C Simulation Results

Sunday December 07 2025 00:12:41 UTC

GitHub Revision: `9ce72b8`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	80.180s	17255.325us	50	50	100.00
V1	target_smoke	i2c_target_smoke	41.700s	1686.464us	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	0.930s	30.396us	5	5	100.00
V1	csr_rw	i2c_csr_rw	0.890s	24.720us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	3.850s	3112.852us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	1.740s	290.433us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.480s	33.612us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	0.890s	24.720us	20	20	100.00
		i2c_csr_aliasing	1.740s	290.433us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	5.790s	644.422us	1	50	2.00
V2	host_stress_all	i2c_host_stress_all	2363.790s	600000.000us	12	50	24.00
V2	host_maxperf	i2c_host_perf	2244.610s	29039.657us	50	50	100.00
V2	host_override	i2c_host_override	1.050s	26.649us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	260.520s	21043.731us	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	131.840s	3841.535us	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.650s	369.877us	50	50	100.00
		i2c_host_fifo_fmt_empty	19.880s	1887.378us	50	50	100.00
		i2c_host_fifo_reset_rx	10.830s	1572.223us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	157.400s	10949.992us	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	32.970s	3483.398us	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.380s	315.928us	12	50	24.00
V2	target_glitch	i2c_target_glitch	4.380s	568.809us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	1456.740s	71825.293us	48	50	96.00
V2	target_maxperf	i2c_target_perf	8.480s	3619.356us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	61.720s	13083.097us	50	50	100.00
		i2c_target_intr_smoke	10.500s	3029.357us	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.300s	249.206us	50	50	100.00
		i2c_target_fifo_reset_tx	2.530s	328.476us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	1160.340s	64683.878us	50	50	100.00
		i2c_target_stress_rd	61.720s	13083.097us	50	50	100.00
		i2c_target_intr_stress_wr	531.590s	31173.394us	49	50	98.00
V2	target_timeout	i2c_target_timeout	9.560s	3160.246us	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	72.180s	5298.744us	47	50	94.00
V2	bad_address	i2c_target_bad_addr	9.510s	5931.493us	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	33.990s	10209.671us	23	50	46.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.430s	651.548us	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.110s	183.872us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	2244.610s	29039.657us	50	50	100.00
		i2c_host_perf_precise	195.690s	6200.819us	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	32.970s	3483.398us	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	22.770s	2089.785us	49	50	98.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	3.990s	541.591us	50	50	100.00
		i2c_target_nack_acqfull_addr	3.860s	1226.417us	50	50	100.00
		i2c_target_nack_txstretch	2.280s	146.806us	33	50	66.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	19.430s	674.711us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.440s	528.360us	50	50	100.00
V2	alert_test	i2c_alert_test	1.010s	23.071us	50	50	100.00
V2	intr_test	i2c_intr_test	0.850s	22.917us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	1.970s	138.767us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	1.970s	138.767us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	0.930s	30.396us	5	5	100.00
		i2c_csr_rw	0.890s	24.720us	20	20	100.00
		i2c_csr_aliasing	1.740s	290.433us	5	5	100.00
		i2c_same_csr_outstanding	1.170s	114.247us	19	20	95.00
V2	tl_d_partial_access	i2c_csr_hw_reset	0.930s	30.396us	5	5	100.00
		i2c_csr_rw	0.890s	24.720us	20	20	100.00
		i2c_csr_aliasing	1.740s	290.433us	5	5	100.00
		i2c_same_csr_outstanding	1.170s	114.247us	19	20	95.00
V2		TOTAL			1613	1792	90.01
V2S	tl_intg_err	i2c_tl_intg_err	1.920s	124.899us	20	20	100.00
		i2c_sec_cm	1.490s	134.156us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	1.920s	124.899us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	53.780s	977.766us	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	2.620s	493.761us	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	16.450s	528.777us	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1793	2042	87.81

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
86.21	97.25	89.14	89.66	47.62	93.83	96.41	89.53

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 95 failures:

Test i2c_host_error_intr has 49 failures.

0.i2c_host_error_intr.30884145453746577643143249288083984712878769251808006273897542932946240514229
Line 123, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 122433670 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 122433670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.106359232857438108550899295261863862429579576088528931764632396046731752654014
Line 99, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 121515915 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 121515915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 47 more failures.

Test i2c_host_stress_all has 28 failures.

0.i2c_host_stress_all.53095262962328983010093383025803336727074720039830442287684996276088666245114
Line 168, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 6738515938 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 6738515938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all.60088057289302432667575222430823084058985517068903456419161424640606518624613
Line 110, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 9159547877 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 9159547877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 26 more failures.

Test i2c_target_stress_all_with_rand_reset has 3 failures.

5.i2c_target_stress_all_with_rand_reset.50433144266716027163729422972868651685081477310877489647553519574559238101999
Line 93, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 930310106 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 930310106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_target_stress_all_with_rand_reset.1032093050214749659383206092941025333402821611093147556269344419235110470980
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @   7555782 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   7555782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

Test i2c_host_mode_toggle has 15 failures.

5.i2c_host_mode_toggle.29870019035001221896363689044139473645526861993058139098548118115227042401043
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  97706466 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  97706466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

8.i2c_host_mode_toggle.29911952308040352841298022701622570031290233379058953203418134777828945003425
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  27799754 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  27799754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 13 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 29 failures:
- Test i2c_target_unexp_stop has 29 failures.
  - 2.i2c_target_unexp_stop.63762679000911500499949232771052784559598611391757488980584654435357080353546
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 879915336 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 141 [0x8d])
  UVM_INFO @ 879915336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_unexp_stop.59989079928163728662779692623285008343441900207747871594751900020748411411094
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 125899481 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 183 [0xb7])
  UVM_INFO @ 125899481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 27 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 27 failures:
- Test i2c_target_hrst has 27 failures.
  - 0.i2c_target_hrst.15188586491061944301606665631993258399438193496064817609176489624526745944648
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10036612151 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10036612151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_hrst.96304357602701894214759601426690354322505636066258481497211393697648141038630
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10103935484 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10103935484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 25 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 17 failures:
- Test i2c_target_nack_txstretch has 17 failures.
  - 1.i2c_target_nack_txstretch.35808148189583445699963927495319914576553070479730282565329348422540037326549
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 1549775967 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 1549775967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_nack_txstretch.18873354799189235323699321131784929621909689609163741528421590857424836183379
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 144240816 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 144240816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 15 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 16 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.69572879655995863378192629992622419563123217009318850591976318670566781106568
Line 97, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 749128805 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 749128805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.7375157539119909375882445172231355822251958585797014809809751683784055250269
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1789775309 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1789775309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 6 failures.

0.i2c_target_stress_all_with_rand_reset.63640529147288954482888890473726895616142258973585122248574706473732537973628
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 2969976813 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 2969976813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_stress_all_with_rand_reset.62696019974949464405581384004574817558841728798554321796309117478559543121666
Line 80, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 146613611 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 146613611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 16 failures:
- Test i2c_target_unexp_stop has 16 failures.
  - 1.i2c_target_unexp_stop.49538794558852692423588818939733213872712339019161953010023877184795379893910
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  28261384 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @  28261384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_unexp_stop.62709020956754080496185471025046144865686945524980533132630500323316514017557
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 705668555 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 705668555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 14 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 16 failures:

Test i2c_host_stress_all has 8 failures.

2.i2c_host_stress_all.22735162861458018269532349240081754564581398888395605917439884112618772969419
Line 151, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 88866793279 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3296483

5.i2c_host_stress_all.29892694828453120459240351085220807022474661190854863622596309092779614499194
Line 130, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 11475282061 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3459443

... and 6 more failures.

Test i2c_host_mode_toggle has 8 failures.

10.i2c_host_mode_toggle.66017377436075816008425969517656006213322537266659511314948885260259597935057
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  89479602 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @20922

17.i2c_host_mode_toggle.15387822661268818639903870043565578223589784532559575289692844237463418934232
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/17.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 168175674 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @181922

... and 6 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 8 failures:

Test i2c_host_mode_toggle has 8 failures.

2.i2c_host_mode_toggle.62657308739039933055043442324766120157600108510909756135114448034161384820823
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 283084963 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

6.i2c_host_mode_toggle.48636125582314256555398751957426403299151112195527028097326993244808680604496
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  89136604 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 6 more failures.

UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 6 failures:
- Test i2c_host_mode_toggle has 6 failures.
  - 21.i2c_host_mode_toggle.83444019442988626425473241768725295652632221997668050002397211980651356632676
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/21.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 220410287 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x43802b94, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 220410287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 22.i2c_host_mode_toggle.115464003228728421792003306786071323851714004472779892789941980664578415469223
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/22.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  72471040 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xa1399694, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  72471040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 4 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 5 failures:

Test i2c_target_unexp_stop has 5 failures.

0.i2c_target_unexp_stop.63929009079154170358900343881467575166068947777280594679530047023693443173723
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 137319166 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 137319166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

13.i2c_target_unexp_stop.71506385724452242244491579368965317268802290841766299417875958909053936020807
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 297090602 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 297090602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 3 failures:
- Test i2c_target_intr_stress_wr has 1 failures.
  - 1.i2c_target_intr_stress_wr.98003224918197252721071035634853415879510288387548851627290120295568578894920
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_intr_stress_wr/latest/run.log
```
  UVM_FATAL @ 13154660088 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 13154660088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
- Test i2c_target_stress_all has 2 failures.
  - 19.i2c_target_stress_all.26379554077275987638156652370369317696647011590238448802278341744236247874913
    Line 102, in log /nightly/current_run/scratch/master/i2c-sim-vcs/19.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 80635059297 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 80635059297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 24.i2c_target_stress_all.39245327400824937511821043618076745786379317606635076045308984036182017495367
    Line 110, in log /nightly/current_run/scratch/master/i2c-sim-vcs/24.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 69407675042 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 69407675042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 3 failures:
- Test i2c_target_stretch has 3 failures.
  - 6.i2c_target_stretch.115410651761000945431322550745746295419744588931442856237921060336279702199185
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10055960799 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10055960799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 38.i2c_target_stretch.113723680140976167579241907249425556431938940164030362453103023659196555130434
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/38.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10011776354 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10011776354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.44669112355020894572916755000272173664851860616700127769639814862895929920623
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 568808931 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 568808931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.71810078883366862834747114194386344574105187967617241782316852919077491894625
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 1484569523 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 1484569523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (cip_base_vseq.sv:840) [i2c_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
- Test i2c_same_csr_outstanding has 1 failures.
  - 10.i2c_same_csr_outstanding.63849306576583818477175310504144925470419532559273359819468835734599943245016
    Line 74, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  48132869 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed data & ~ro_mask == 0 (64 [0x40] vs 0 [0x0])
  UVM_INFO @  48132869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[CNST-CIF] Constraints inconsistency failure has 1 failures:
- Test i2c_target_tx_stretch_ctrl has 1 failures.
  - 1.i2c_target_tx_stretch_ctrl.65523548708578622568376797281734067510154691915699315934186805503631685542987
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
UVM_ERROR (cip_base_vseq.sv:1142) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. has 1 failures:
- Test i2c_target_stress_all_with_rand_reset has 1 failures.
  - 9.i2c_target_stress_all_with_rand_reset.72349360270279210700211611520008299131846812744458598989144088546409948319762
    Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 528776560 ps: (cip_base_vseq.sv:1142) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
  UVM_INFO @ 528776560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 15.i2c_host_mode_toggle.69049988238081867561301792403627526091050427797305967060538289434217612253333
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/15.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 29.i2c_host_stress_all.80917838822704155603642116102533655230427677077078818464053326446082182278431
    Line 195, in log /nightly/current_run/scratch/master/i2c-sim-vcs/29.i2c_host_stress_all/latest/run.log
```
  UVM_ERROR @ 54937785811 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @8261465
```
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 36.i2c_host_stress_all.49877507399812530453095744683435354880016173803300088471623903981528303616157
    Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_host_stress_all/latest/run.log
```
  UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```