PRIM_ALERT Simulation Results

Sunday December 07 2025 00:12:41 UTC

GitHub Revision: 9ce72b8

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	prim_alert_request_test	prim_async_alert	0.680s	10.334us	20	20	100.00
		prim_async_fatal_alert	0.660s	30.482us	20	20	100.00
		prim_sync_alert	0.580s	9.173us	20	20	100.00
		prim_sync_fatal_alert	0.590s	28.103us	20	20	100.00
V1	prim_alert_test	prim_async_alert	0.680s	10.334us	20	20	100.00
		prim_async_fatal_alert	0.660s	30.482us	20	20	100.00
		prim_sync_alert	0.580s	9.173us	20	20	100.00
		prim_sync_fatal_alert	0.590s	28.103us	20	20	100.00
V1	prim_alert_ping_request_test	prim_async_alert	0.680s	10.334us	20	20	100.00
		prim_async_fatal_alert	0.660s	30.482us	20	20	100.00
		prim_sync_alert	0.580s	9.173us	20	20	100.00
		prim_sync_fatal_alert	0.590s	28.103us	20	20	100.00
V1	prim_alert_integrity_errors_test	prim_async_alert	0.680s	10.334us	20	20	100.00
		prim_async_fatal_alert	0.660s	30.482us	20	20	100.00
		prim_sync_alert	0.580s	9.173us	20	20	100.00
		prim_sync_fatal_alert	0.590s	28.103us	20	20	100.00
V1		TOTAL			80	80	100.00
V2	prim_alert_init_trigger_test	prim_async_alert	0.680s	10.334us	20	20	100.00
		prim_async_fatal_alert	0.660s	30.482us	20	20	100.00
		prim_sync_alert	0.580s	9.173us	20	20	100.00
		prim_sync_fatal_alert	0.590s	28.103us	20	20	100.00
	Unmapped tests	prim_async_fatal_alert_with_3_cycles_skew	0.500s	31.764us	17	20	85.00
		TOTAL			97	100	97.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
95.19	100.00	100.00	100.00	89.29	95.83	86.05

Failure Buckets

• Offending 'ping_ok_o' has 2 failures:

  • Test prim_async_fatal_alert_with_3_cycles_skew has 2 failures.

    • 15.prim_async_fatal_alert_with_3_cycles_skew.97147252542040075385057251201552366678068014317464415027591044180698587510620
      Line 97, in log /nightly/current_run/scratch/master/prim_alert-sim-vcs/15.prim_async_fatal_alert_with_3_cycles_skew/latest/run.log

            Offending 'ping_ok_o'
        UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(312) @ 30443000: reporter [ASSERT FAILED] PingResponse1_A
        Starting assertion attempts at time 30473282ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
        [prim_alert_seq] Ping signal integrity error sequence finished!
      

    • 16.prim_async_fatal_alert_with_3_cycles_skew.71031765163263909675791195895073028088683932241013525957012992539081830452478
      Line 97, in log /nightly/current_run/scratch/master/prim_alert-sim-vcs/16.prim_async_fatal_alert_with_3_cycles_skew/latest/run.log

            Offending 'ping_ok_o'
        UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(312) @ 31178000: reporter [ASSERT FAILED] PingResponse1_A
        Starting assertion attempts at time 31238010ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
        [prim_alert_seq] Ping signal integrity error sequence finished!
      

• Offending 'alert_o' has 1 failures:

  • Test prim_async_fatal_alert_with_3_cycles_skew has 1 failures.

    • 7.prim_async_fatal_alert_with_3_cycles_skew.35044730254094198912315820460139305922217945680989220646829948158728395439427
      Line 97, in log /nightly/current_run/scratch/master/prim_alert-sim-vcs/7.prim_async_fatal_alert_with_3_cycles_skew/latest/run.log

            Offending 'alert_o'
        UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(320) @ 29925000: reporter [ASSERT FAILED] Alert_A
        Starting assertion attempts at time 29995145ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
        [prim_alert_seq] Ping signal integrity error sequence finished!