SPI_DEVICE/2P Simulation Results

Sunday December 07 2025 00:12:41 UTC

GitHub Revision: `9ce72b8`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	461.590s	72005.382us	99	100	99.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.580s	96.501us	10	10	100.00
V1	csr_rw	spi_device_csr_rw	2.730s	39.988us	40	40	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	27.070s	13545.359us	10	10	100.00
V1	csr_aliasing	spi_device_csr_aliasing	22.480s	1129.853us	10	10	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	3.790s	188.344us	40	40	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	2.730s	39.988us	40	40	100.00
		spi_device_csr_aliasing	22.480s	1129.853us	10	10	100.00
V1	mem_walk	spi_device_mem_walk	0.990s	36.330us	10	10	100.00
V1	mem_partial_access	spi_device_mem_partial_access	2.010s	53.972us	10	10	100.00
V1		TOTAL			229	230	99.57
V2	csb_read	spi_device_csb_read	1.200s	27.804us	100	100	100.00
V2	mem_parity	spi_device_mem_parity	1.440s	32.609us	20	40	50.00
V2	mem_cfg	spi_device_ram_cfg	1.010s	5.721us	1	2	50.00
V2	tpm_read	spi_device_tpm_rw	9.680s	257.223us	100	100	100.00
V2	tpm_write	spi_device_tpm_rw	9.680s	257.223us	100	100	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	30.140s	50821.763us	100	100	100.00
		spi_device_tpm_sts_read	1.470s	511.760us	100	100	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	51.110s	44817.094us	100	100	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	49.590s	14211.834us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	48.540s	33275.453us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	48.540s	33275.453us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_info_slots	spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_read_status	spi_device_intercept	28.000s	24003.613us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_read_jedec	spi_device_intercept	28.000s	24003.613us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_read_sfdp	spi_device_intercept	28.000s	24003.613us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_fast_read	spi_device_intercept	28.000s	24003.613us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	cmd_read_pipeline	spi_device_intercept	28.000s	24003.613us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	flash_cmd_upload	spi_device_upload	39.010s	50178.186us	100	100	100.00
V2	mailbox_command	spi_device_mailbox	181.520s	20881.299us	100	100	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	181.520s	20881.299us	100	100	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	181.520s	20881.299us	100	100	100.00
V2	cmd_read_buffer	spi_device_flash_mode	48.460s	37600.598us	100	100	100.00
		spi_device_read_buffer_direct	21.410s	1534.678us	100	100	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	181.520s	20881.299us	100	100	100.00
		spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	quad_spi	spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	dual_spi	spi_device_flash_all	471.930s	369542.260us	99	100	99.00
V2	4b_3b_feature	spi_device_cfg_cmd	39.830s	4305.217us	100	100	100.00
V2	write_enable_disable	spi_device_cfg_cmd	39.830s	4305.217us	100	100	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	461.590s	72005.382us	99	100	99.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	766.500s	96521.084us	97	100	97.00
V2	stress_all	spi_device_stress_all	1313.170s	796991.228us	100	100	100.00
V2	alert_test	spi_device_alert_test	1.120s	13.297us	100	100	100.00
V2	intr_test	spi_device_intr_test	1.060s	15.504us	100	100	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	5.050s	404.869us	40	40	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	5.050s	404.869us	40	40	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.580s	96.501us	10	10	100.00
		spi_device_csr_rw	2.730s	39.988us	40	40	100.00
		spi_device_csr_aliasing	22.480s	1129.853us	10	10	100.00
		spi_device_same_csr_outstanding	4.560s	163.432us	40	40	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.580s	96.501us	10	10	100.00
		spi_device_csr_rw	2.730s	39.988us	40	40	100.00
		spi_device_csr_aliasing	22.480s	1129.853us	10	10	100.00
		spi_device_same_csr_outstanding	4.560s	163.432us	40	40	100.00
V2		TOTAL			1897	1922	98.70
V2S	tl_intg_err	spi_device_tl_intg_err	18.730s	1137.497us	40	40	100.00
		spi_device_sec_cm	1.690s	198.352us	10	10	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	18.730s	1137.497us	40	40	100.00
V2S		TOTAL			50	50	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	3539.550s	1500000.000us	98	100	98.00
		TOTAL			2274	2302	98.78

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.01	99.17	96.65	87.74	89.36	98.49	94.41	99.26

Failure Buckets

UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*]) has 20 failures:

Test spi_device_mem_parity has 20 failures.

0.spi_device_mem_parity.72888704444586024347046342160490164622215591460628435148018708645655453312954
Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

  UVM_ERROR @   1484644 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[36])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name
  UVM_ERROR @   1484644 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
  UVM_ERROR @   1484644 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[932])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name

1.spi_device_mem_parity.62958691381586680476780106274001145255938955791436945381253833998228277884637
Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/1.spi_device_mem_parity/latest/run.log

  UVM_ERROR @   2698930 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[81])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name
  UVM_ERROR @   2698930 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
  UVM_ERROR @   2698930 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[977])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name

... and 18 more failures.

UVM_ERROR (spi_device_scoreboard.sv:2512) [scoreboard] Check failed item.d_data == gmv(csr) (* [] vs * []) CSR last_read_addr compare mismatch act * != exp *` has 5 failures:

Test spi_device_flash_and_tpm_min_idle has 3 failures.

15.spi_device_flash_and_tpm_min_idle.43631775972513318039501332940993759459337755084000375411291409829855703261370
Line 96, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/15.spi_device_flash_and_tpm_min_idle/latest/run.log

  UVM_ERROR @ 48461005619 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (15086592 [0xe63400] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xe63400 != exp 0x0
  tl_ul_fuzzy_flash_status_q[i] = 0xcd89ba
  UVM_INFO @ 59042282634 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 4/5
  UVM_INFO @ 59054358662 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.tpm_vseq] starting sequence 4/5
  UVM_INFO @ 61866628577 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.tpm_vseq] starting sequence 5/5

16.spi_device_flash_and_tpm_min_idle.71991255701761350467134308765691278095059701509518668986938756635939920757763
Line 84, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/16.spi_device_flash_and_tpm_min_idle/latest/run.log

  UVM_ERROR @ 977431282 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (12626944 [0xc0ac00] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xc0ac00 != exp 0x0
  UVM_INFO @ 1101480232 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 1/10
  UVM_INFO @ 1101480232 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 2/10
  tl_ul_fuzzy_flash_status_q[i] = 0xb3145c
  UVM_INFO @ 1336183514 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_min_idle_vseq.tpm_vseq] starting sequence 3/3

... and 1 more failures.

Test spi_device_flash_all has 1 failures.

32.spi_device_flash_all.30376054188758720132079057074633698467470530796704105929602927375020010221382
Line 108, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/32.spi_device_flash_all/latest/run.log

  UVM_ERROR @ 117836194558 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (15912960 [0xf2d000] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xf2d000 != exp 0x0
  UVM_INFO @ 122317835795 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_all_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 10/11
  UVM_INFO @ 122773618197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test spi_device_flash_and_tpm has 1 failures.

49.spi_device_flash_and_tpm.110720214508308598734229109507377984196290983239488629356053605993984517393015
Line 113, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/49.spi_device_flash_and_tpm/latest/run.log

  UVM_ERROR @ 1863083970 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (8859648 [0x873000] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0x873000 != exp 0x0
  UVM_INFO @ 1891152833 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 7/13
  UVM_INFO @ 1891152833 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 8/13
  tl_ul_fuzzy_flash_status_q[i] = 0x412f84
  tl_ul_fuzzy_flash_status_q[i] = 0x412f84

Job timed out after * minutes has 1 failures:
- Test spi_device_flash_mode_ignore_cmds has 1 failures.
  - 30.spi_device_flash_mode_ignore_cmds.5805388434707751995610788609917828105605584613053443351753163207733945472937
    Log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/30.spi_device_flash_mode_ignore_cmds/latest/run.log
```
  Job timed out after 60 minutes
```

UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*]) has 1 failures:

Test spi_device_ram_cfg has 1 failures.

0.spi_device_ram_cfg.16331606858312829735775766952510267370410831984564573858254868913027180969007
Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

  UVM_ERROR @   3265391 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3eee8a [1111101110111010001010] vs 0x0 [0])
  UVM_ERROR @   3300391 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd528e0 [110101010010100011100000] vs 0x0 [0])
  UVM_ERROR @   3378391 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x472a6f [10001110010101001101111] vs 0x0 [0])
  UVM_ERROR @   3465391 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x116cab [100010110110010101011] vs 0x0 [0])
  UVM_ERROR @   3476391 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x719b05 [11100011001101100000101] vs 0x0 [0])

UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
- Test spi_device_flash_mode_ignore_cmds has 1 failures.
  - 41.spi_device_flash_mode_ignore_cmds.19509651251385157077323338350818807008258952035741556518262094492737457879174
    Line 106, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/41.spi_device_flash_mode_ignore_cmds/latest/run.log
```
  UVM_FATAL @ 1500000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1500000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 1500000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```