SPI_HOST Simulation Results

Sunday December 07 2025 00:12:41 UTC

GitHub Revision: `9ce72b8`

Branch: master

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_host_smoke	138.000s	25625.696us	50	50	100.00
V1	csr_hw_reset	spi_host_csr_hw_reset	2.000s	20.769us	5	5	100.00
V1	csr_rw	spi_host_csr_rw	2.000s	61.022us	20	20	100.00
V1	csr_bit_bash	spi_host_csr_bit_bash	3.000s	126.011us	5	5	100.00
V1	csr_aliasing	spi_host_csr_aliasing	2.000s	60.378us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	spi_host_csr_mem_rw_with_rand_reset	2.000s	29.961us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_host_csr_rw	2.000s	61.022us	20	20	100.00
		spi_host_csr_aliasing	2.000s	60.378us	5	5	100.00
V1	mem_walk	spi_host_mem_walk	2.000s	29.569us	5	5	100.00
V1	mem_partial_access	spi_host_mem_partial_access	2.000s	65.275us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	performance	spi_host_performance	3.000s	168.103us	50	50	100.00
V2	error_event_intr	spi_host_overflow_underflow	73.000s	11590.374us	50	50	100.00
		spi_host_error_cmd	2.000s	17.967us	50	50	100.00
		spi_host_event	909.000s	34365.516us	50	50	100.00
V2	clock_rate	spi_host_speed	29.000s	10027.312us	49	50	98.00
V2	speed	spi_host_speed	29.000s	10027.312us	49	50	98.00
V2	chip_select_timing	spi_host_speed	29.000s	10027.312us	49	50	98.00
V2	sw_reset	spi_host_sw_reset	61.000s	2470.112us	50	50	100.00
V2	passthrough_mode	spi_host_passthrough_mode	7.000s	276.901us	50	50	100.00
V2	cpol_cpha	spi_host_speed	29.000s	10027.312us	49	50	98.00
V2	full_cycle	spi_host_speed	29.000s	10027.312us	49	50	98.00
V2	duplex	spi_host_smoke	138.000s	25625.696us	50	50	100.00
V2	tx_rx_only	spi_host_smoke	138.000s	25625.696us	50	50	100.00
V2	stress_all	spi_host_stress_all	88.000s	7874.570us	50	50	100.00
V2	spien	spi_host_spien	136.000s	30267.396us	50	50	100.00
V2	stall	spi_host_status_stall	956.000s	101966.692us	47	50	94.00
V2	Idlecsbactive	spi_host_idlecsbactive	25.000s	7215.572us	50	50	100.00
V2	data_fifo_status	spi_host_overflow_underflow	73.000s	11590.374us	50	50	100.00
V2	alert_test	spi_host_alert_test	2.000s	29.117us	50	50	100.00
V2	intr_test	spi_host_intr_test	2.000s	44.440us	50	50	100.00
V2	tl_d_oob_addr_access	spi_host_tl_errors	3.000s	230.026us	20	20	100.00
V2	tl_d_illegal_access	spi_host_tl_errors	3.000s	230.026us	20	20	100.00
V2	tl_d_outstanding_access	spi_host_csr_hw_reset	2.000s	20.769us	5	5	100.00
		spi_host_csr_rw	2.000s	61.022us	20	20	100.00
		spi_host_csr_aliasing	2.000s	60.378us	5	5	100.00
		spi_host_same_csr_outstanding	2.000s	88.759us	20	20	100.00
V2	tl_d_partial_access	spi_host_csr_hw_reset	2.000s	20.769us	5	5	100.00
		spi_host_csr_rw	2.000s	61.022us	20	20	100.00
		spi_host_csr_aliasing	2.000s	60.378us	5	5	100.00
		spi_host_same_csr_outstanding	2.000s	88.759us	20	20	100.00
V2		TOTAL			686	690	99.42
V2S	tl_intg_err	spi_host_sec_cm	2.000s	66.078us	5	5	100.00
		spi_host_tl_intg_err	3.000s	938.826us	20	20	100.00
V2S	sec_cm_bus_integrity	spi_host_tl_intg_err	3.000s	938.826us	20	20	100.00
V2S		TOTAL			25	25	100.00
	Unmapped tests	spi_host_upper_range_clkdiv	513.000s	25972.577us	10	10	100.00
		TOTAL			836	840	99.52

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
96.17	96.82	93.35	98.69	94.35	88.02	100.00	95.21	90.42

Failure Buckets

xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_*/spi_host_data_stable_sva.sv,104): Assertion NEGEDGE_SAME_VALUE_CHECK_P has failed

has 3 failures:

Test spi_host_status_stall has 3 failures.

15.spi_host_status_stall.30690613208508719900593909551459916280835295889989771338823589554214380378837
Line 2781, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/15.spi_host_status_stall/latest/run.log

  xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_0.1/spi_host_data_stable_sva.sv,104): (time 2214477296 PS) Assertion tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1].NEGEDGE_SAME_VALUE_CHECK_P has failed
  UVM_ERROR @ 2214477296 ps: [NEGEDGE_SAME_VALUE_CHECK_P] tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1]: [i=1] - ASSERTION FAILED pos_value (0x0) != neg_value (0x0) - time=2214477000 ps
  UVM_INFO @ 2214477296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

19.spi_host_status_stall.112119359310184606655518345093934359826611327820571699128460248094232906957755
Line 13811, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/19.spi_host_status_stall/latest/run.log

  xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_0.1/spi_host_data_stable_sva.sv,104): (time 22785421525 PS) Assertion tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1].NEGEDGE_SAME_VALUE_CHECK_P has failed
  UVM_ERROR @ 22785421525 ps: [NEGEDGE_SAME_VALUE_CHECK_P] tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1]: [i=1] - ASSERTION FAILED pos_value (0x1) != neg_value (0x1) - time=22785422000 ps
  UVM_INFO @ 22785421525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

UVM_FATAL (spi_host_base_vseq.sv:237) virtual_sequencer [spi_host_env_pkg::spi_host_base_vseq.stoppable_timeout()] timeout = *ns spi_host_reg_block.status.rxqd (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=* has 1 failures:
- Test spi_host_speed has 1 failures.
  - 36.spi_host_speed.114839788181594646768766317429065601891978371707942534383233534211391315352045
    Line 226, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/36.spi_host_speed/latest/run.log
```
  UVM_FATAL @ 10027311726 ps: (spi_host_base_vseq.sv:237) uvm_test_top.env.virtual_sequencer [spi_host_env_pkg::spi_host_base_vseq.stoppable_timeout()] timeout = 10000000ns spi_host_reg_block.status.rxqd (addr=0xeccce4d4, Comparison=CompareOpEq, exp_data=0x0, call_count=37
  UVM_INFO @ 10027311726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```