spi_device Simulation Results

Simulation Results: spi_device

14/12/2025 00:12:36 sha: 801ac60 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
95.97 %

code
94.29 %

assert
94.41 %

func
99.21 %

line
99.18 %

branch
98.51 %

cond
96.65 %

toggle
87.74 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		99.95%
V2S		100.00%
unmapped		98.00%

140/140 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				50	50	100.00
	spi_device_flash_and_tpm	392.650s	128913.139us	50	50	100.00
csr_hw_reset				5	5	100.00
	spi_device_csr_hw_reset	1.500s	72.596us	5	5	100.00
csr_rw				20	20	100.00
	spi_device_csr_rw	2.500s	43.332us	20	20	100.00
csr_bit_bash				5	5	100.00
	spi_device_csr_bit_bash	27.820s	3472.358us	5	5	100.00
csr_aliasing				5	5	100.00
	spi_device_csr_aliasing	15.080s	313.463us	5	5	100.00
csr_mem_rw_with_rand_reset				20	20	100.00
	spi_device_csr_mem_rw_with_rand_reset	3.430s	50.924us	20	20	100.00
regwen_csr_and_corresponding_lockable_csr				25	25	100.00
	spi_device_csr_rw	2.500s	43.332us	20	20	100.00
	spi_device_csr_aliasing	15.080s	313.463us	5	5	100.00
mem_walk				5	5	100.00
	spi_device_mem_walk	0.900s	11.885us	5	5	100.00
mem_partial_access				5	5	100.00
	spi_device_mem_partial_access	2.110s	131.890us	5	5	100.00

2160/2161 passed

99.95 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				50	50	100.00
	spi_device_csb_read	1.210s	16.554us	50	50	100.00
mem_parity				20	20	100.00
	spi_device_mem_parity	1.450s	32.000us	20	20	100.00
mem_cfg				1	1	100.00
	spi_device_ram_cfg	0.930s	80.889us	1	1	100.00
tpm_read				50	50	100.00
	spi_device_tpm_rw	6.780s	595.554us	50	50	100.00
tpm_write				50	50	100.00
	spi_device_tpm_rw	6.780s	595.554us	50	50	100.00
tpm_hw_reg				100	100	100.00
	spi_device_tpm_read_hw_reg	21.690s	13362.915us	50	50	100.00
	spi_device_tpm_sts_read	1.520s	214.793us	50	50	100.00
tpm_fully_random_case				50	50	100.00
	spi_device_tpm_all	43.330s	10237.427us	50	50	100.00
pass_cmd_filtering				100	100	100.00
	spi_device_pass_cmd_filtering	30.320s	38611.293us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
pass_addr_translation				100	100	100.00
	spi_device_pass_addr_payload_swap	22.200s	31096.089us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
pass_payload_translation				100	100	100.00
	spi_device_pass_addr_payload_swap	22.200s	31096.089us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_info_slots				50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_read_status				100	100	100.00
	spi_device_intercept	17.080s	1648.536us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_read_jedec				100	100	100.00
	spi_device_intercept	17.080s	1648.536us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_read_sfdp				100	100	100.00
	spi_device_intercept	17.080s	1648.536us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_fast_read				100	100	100.00
	spi_device_intercept	17.080s	1648.536us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
cmd_read_pipeline				100	100	100.00
	spi_device_intercept	17.080s	1648.536us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
flash_cmd_upload				50	50	100.00
	spi_device_upload	46.150s	29560.164us	50	50	100.00
mailbox_command				50	50	100.00
	spi_device_mailbox	66.620s	7772.137us	50	50	100.00
mailbox_cross_outside_command				50	50	100.00
	spi_device_mailbox	66.620s	7772.137us	50	50	100.00
mailbox_cross_inside_command				50	50	100.00
	spi_device_mailbox	66.620s	7772.137us	50	50	100.00
cmd_read_buffer				100	100	100.00
	spi_device_flash_mode	54.580s	26881.269us	50	50	100.00
	spi_device_read_buffer_direct	17.320s	9224.632us	50	50	100.00
cmd_dummy_cycle				100	100	100.00
	spi_device_mailbox	66.620s	7772.137us	50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
quad_spi				50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
dual_spi				50	50	100.00
	spi_device_flash_all	361.510s	995944.530us	50	50	100.00
4b_3b_feature				50	50	100.00
	spi_device_cfg_cmd	16.030s	7134.229us	50	50	100.00
write_enable_disable				50	50	100.00
	spi_device_cfg_cmd	16.030s	7134.229us	50	50	100.00
TPM_with_flash_or_passthrough_mode				50	50	100.00
	spi_device_flash_and_tpm	392.650s	128913.139us	50	50	100.00
tpm_and_flash_trans_with_min_inactive_time				50	50	100.00
	spi_device_flash_and_tpm_min_idle	515.420s	64837.532us	50	50	100.00
stress_all				49	50	98.00
	spi_device_stress_all	659.090s	97823.097us	49	50	98.00
alert_test				50	50	100.00
	spi_device_alert_test	1.120s	16.548us	50	50	100.00
intr_test				50	50	100.00
	spi_device_intr_test	1.090s	29.981us	50	50	100.00
tl_d_oob_addr_access				20	20	100.00
	spi_device_tl_errors	4.910s	209.634us	20	20	100.00
tl_d_illegal_access				20	20	100.00
	spi_device_tl_errors	4.910s	209.634us	20	20	100.00
tl_d_outstanding_access				50	50	100.00
	spi_device_csr_hw_reset	1.500s	72.596us	5	5	100.00
	spi_device_csr_rw	2.500s	43.332us	20	20	100.00
	spi_device_csr_aliasing	15.080s	313.463us	5	5	100.00
	spi_device_same_csr_outstanding	3.780s	575.157us	20	20	100.00
tl_d_partial_access				50	50	100.00
	spi_device_csr_hw_reset	1.500s	72.596us	5	5	100.00
	spi_device_csr_rw	2.500s	43.332us	20	20	100.00
	spi_device_csr_aliasing	15.080s	313.463us	5	5	100.00
	spi_device_same_csr_outstanding	3.780s	575.157us	20	20	100.00

V2S

45/45 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				25	25	100.00
	spi_device_tl_intg_err	17.310s	2218.563us	20	20	100.00
	spi_device_sec_cm	1.580s	130.870us	5	5	100.00
sec_cm_bus_integrity				20	20	100.00
	spi_device_tl_intg_err	17.310s	2218.563us	20	20	100.00

unmapped

49/50 passed

98.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				49	50	98.00
	spi_device_flash_mode_ignore_cmds	398.490s	74568.956us	49	50	98.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (spi_device_scoreboard.sv:2512) [scoreboard] Check failed item.d_data == `gmv(csr) (* [] vs []) CSR last_read_addr compare mismatch act != exp *
	spi_device_stress_all	85215169163346537627303779841866536893305012113389543505881521130508078275229	92	UVM_ERROR @ 7222713005 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (12364800 [0xbcac00] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xbcac00 != exp 0x0 UVM_INFO @ 9522390759 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 3/8 UVM_INFO @ 9522390759 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 4/8 UVM_INFO @ 9909757321 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.tpm_vseq] starting sequence 4/6 tl_ul_fuzzy_flash_status_q[i] = 0x935098
	spi_device_flash_mode_ignore_cmds	103868398753914942552450433412960025931353887906421912800592634277282101725206	91	UVM_ERROR @ 5122651252 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (12566528 [0xbfc000] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xbfc000 != exp 0x0 UVM_INFO @ 5675203454 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 6/14 UVM_INFO @ 5675203454 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 7/14 tl_ul_fuzzy_flash_status_q[i] = 0x6986b4 UVM_INFO @ 6817661832 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 7/14