| V1 |
|
100.00% |
| V2 |
|
99.77% |
| V2S |
|
96.39% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 4.000s | 354.939us | 1 | 1 | 100.00 | |
| smoke | 50 | 50 | 100.00 | |||
| aes_smoke | 12.000s | 454.994us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 72.474us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| aes_csr_rw | 2.000s | 84.194us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| aes_csr_bit_bash | 6.000s | 326.489us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 97.665us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 2.000s | 68.801us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| aes_csr_rw | 2.000s | 84.194us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 97.665us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 150 | 150 | 100.00 | |||
| aes_smoke | 12.000s | 454.994us | 50 | 50 | 100.00 | |
| aes_config_error | 12.000s | 601.621us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| key_length | 150 | 150 | 100.00 | |||
| aes_smoke | 12.000s | 454.994us | 50 | 50 | 100.00 | |
| aes_config_error | 12.000s | 601.621us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| back2back | 100 | 100 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| aes_b2b | 30.000s | 569.926us | 50 | 50 | 100.00 | |
| backpressure | 50 | 50 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| multi_message | 199 | 200 | 99.50 | |||
| aes_smoke | 12.000s | 454.994us | 50 | 50 | 100.00 | |
| aes_config_error | 12.000s | 601.621us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| failure_test | 149 | 150 | 99.33 | |||
| aes_man_cfg_err | 7.000s | 375.032us | 50 | 50 | 100.00 | |
| aes_config_error | 12.000s | 601.621us | 50 | 50 | 100.00 | |
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| trigger_clear_test | 50 | 50 | 100.00 | |||
| aes_clear | 43.000s | 2467.898us | 50 | 50 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 13.000s | 536.442us | 1 | 1 | 100.00 | |
| reset_recovery | 49 | 50 | 98.00 | |||
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| stress | 50 | 50 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| sideload | 100 | 100 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| aes_sideload | 7.000s | 536.839us | 50 | 50 | 100.00 | |
| deinitialization | 50 | 50 | 100.00 | |||
| aes_deinit | 45.000s | 2057.495us | 50 | 50 | 100.00 | |
| stress_all | 10 | 10 | 100.00 | |||
| aes_stress_all | 76.000s | 3143.161us | 10 | 10 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| aes_alert_test | 3.000s | 69.098us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 194.797us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 194.797us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 72.474us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 84.194us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 97.665us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 183.347us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 72.474us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 84.194us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 97.665us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 183.347us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 50 | 50 | 100.00 | |||
| aes_reseed | 81.000s | 3979.995us | 50 | 50 | 100.00 | |
| fault_inject | 668 | 700 | 95.43 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 5.000s | 604.111us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| aes_sec_cm | 7.000s | 1377.447us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 796.052us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 796.052us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 49 | 50 | 98.00 | |||
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 219 | 220 | 99.55 | |||
| aes_smoke | 12.000s | 454.994us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| aes_core_fi | 8.000s | 136.174us | 70 | 70 | 100.00 | |
| sec_cm_gcm_config_sparse | 100 | 100 | 100.00 | |||
| aes_config_error | 12.000s | 601.621us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 309.344us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 100 | 100 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 100 | 100 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| aes_sideload | 7.000s | 536.839us | 50 | 50 | 100.00 | |
| sec_cm_key_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| sec_cm_key_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 75.157us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_key_sca | 50 | 50 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| sec_cm_key_masking | 50 | 50 | 100.00 | |||
| aes_stress | 85.000s | 4353.251us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_sparse | 50 | 50 | 100.00 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_redun | 718 | 750 | 95.73 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 50 | 50 | 100.00 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_redun | 668 | 700 | 95.43 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| sec_cm_cipher_ctr_redun | 334 | 350 | 95.43 | |||
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| sec_cm_ctr_fsm_sparse | 50 | 50 | 100.00 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| sec_cm_ctr_fsm_redun | 384 | 400 | 96.00 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_ctrl_sparse | 718 | 750 | 95.73 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_global_esc | 49 | 50 | 98.00 | |||
| aes_alert_reset | 40.000s | 10015.903us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_local_esc | 718 | 750 | 95.73 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 718 | 750 | 95.73 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 384 | 400 | 96.00 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_ctr_fi | 3.000s | 49.257us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_local_esc | 668 | 700 | 95.43 | |||
| aes_fi | 6.000s | 117.229us | 50 | 50 | 100.00 | |
| aes_control_fi | 58.000s | 10006.647us | 284 | 300 | 94.67 | |
| aes_cipher_fi | 59.000s | 10004.849us | 334 | 350 | 95.43 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 40.000s | 1208.206us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | ||||
| aes_stress_all_with_rand_reset | 61737693648402069562241455662620098194672951885929622711384750171015623121877 | 370 |
UVM_FATAL @ 352269398 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 352269398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 50379733644998936682302912598537814101478248940499669443835129297197477998300 | 872 |
UVM_FATAL @ 1208205933 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1208205933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | ||||
| aes_stress_all_with_rand_reset | 57697932786567788926203202963934461515992146542260683460077460530844494266363 | 305 |
UVM_ERROR @ 1835280508 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1835280508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 6957610604018463200524044723680210976103701141655552503248988166604719707632 | 160 |
UVM_ERROR @ 1754197462 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1754197462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 100950417965891144524148190554642938422356293567545675777637153194914467942610 | 163 |
UVM_ERROR @ 1821503858 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1821503858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | ||||
| aes_cipher_fi | 78014400889294702330337790977454170866922037281413486345671450432804107542904 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 67960765038765640953977325343149452828762354028923576704671636176701608835692 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 20575361839084810928312245536872937708377917258366775863832188016784312231691 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 44200006002991684047021194221993122410403747350938375184275100821732581213526 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 98464844668486703159401833316347409132101810108408082543197671586255216123528 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 87008048865239803585904331272655841798788057979991075583481470834094250872288 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 79297854434075932454613988233703888948107833397467345990383405149470171173600 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 88556526512163323600961166827687286537819015386400867863773894946577834381897 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 105539194157184762893415560264779521979880039405030304343129548010680634087613 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 57532817731338289006842685519356835541061252167795645037715952011680477850243 | None |
Job timed out after 1 minutes
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_stress_all_with_rand_reset | 32566296533427415552329277371236752626099899138155486854010589932614717628193 | 446 |
UVM_ERROR @ 232737853 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 232737853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 7513582027350258892897883753539139540654403637263001479945285179735832230861 | 304 |
UVM_ERROR @ 4935488899 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 4935488899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 81758658706892417043982532082306871127549271815402841962169582076179788633440 | 1055 |
UVM_ERROR @ 2613367239 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2613367239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 27825614624494923679184700863670783528545297738430190277665922673008842097348 | 571 |
UVM_ERROR @ 429774836 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 429774836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 56300585834001531905505025296840779023225273476138026775592492060662048593204 | 266 |
UVM_ERROR @ 207337666 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 207337666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) | ||||
| aes_alert_reset | 19103897343557513089473464531252883085080613959148337653183306080684482082361 | 202435 |
UVM_FATAL @ 10015902971 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x58ff9f84, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10015902971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | ||||
| aes_cipher_fi | 49850174549127472216565617715839018053718283931042138790639651572999372314577 | 143 |
UVM_FATAL @ 10095381126 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10095381126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 109860499463002771858841183593568633885177151007681061515824955962928336293796 | 149 |
UVM_FATAL @ 10019671109 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019671109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 18594557205972307279479598213164085078947537343892823001825974395141263311772 | 142 |
UVM_FATAL @ 10054608505 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10054608505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 66896848108739371453145740649959882013354768973898461977144652670921702759664 | 140 |
UVM_FATAL @ 10013782006 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013782006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 79466174432707224776905661669617581849311116592689026003956209659824282855879 | 139 |
UVM_FATAL @ 10051577820 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10051577820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 59762072556658599095750027498363852820293940147665191406432994431661013953877 | 133 |
UVM_FATAL @ 10010033532 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010033532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 104643988029220544713708425709182283338452015207713228755133983742063812834788 | 146 |
UVM_FATAL @ 10012791230 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012791230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 100640560934539352951882422791570269176645887834828106880359449579380071842365 | 142 |
UVM_FATAL @ 10003242826 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003242826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 64508734962434695146863307707180923304360282597223870013860521556450572886938 | 137 |
UVM_FATAL @ 10005679547 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005679547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 7570981758878018588417165879880242382977836975247476861991722528467090603180 | 130 |
UVM_FATAL @ 10004849008 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004849008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 55147606520154006625415292492572764922516557004800373905479405150299847026216 | 141 |
UVM_FATAL @ 10020383654 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020383654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 40396998758875624223140289434623069276146971816550217594911861529143369558586 | 140 |
UVM_FATAL @ 10016935047 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016935047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | ||||
| aes_control_fi | 91883404262110691172991736217736749454918651133966483222963217647897950164810 | 136 |
UVM_FATAL @ 10024118560 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10024118560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68106570251108788722308107896795431431882155718031462769001879141803694511988 | 148 |
UVM_FATAL @ 10029441633 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10029441633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 86184557376257502225983150761652159503522121254982621081664503224653361235787 | 135 |
UVM_FATAL @ 10006646563 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006646563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 37445909257832602913535255256076540910621819265286745369591688406055869682252 | 138 |
UVM_FATAL @ 10010887740 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010887740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68971123409307042663702566567764564232030805494363378197371071598956549773020 | 138 |
UVM_FATAL @ 10004149238 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004149238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 58674021162928249682411213914248492549402682414902168429963060778807931075752 | 137 |
UVM_FATAL @ 10012834049 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012834049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 47434397820592347290351256058182242258203990074366433498038338623234410367966 | 139 |
UVM_FATAL @ 10004572843 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004572843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 21673804705302255476781518007383850604588700696562891892074813529303815591434 | 135 |
UVM_FATAL @ 10004074702 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004074702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 79487678302979826898823366455984097374540664689759566145492124345372351009439 | 137 |
UVM_FATAL @ 10011696044 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011696044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) | ||||
| aes_cipher_fi | 78686642615884385349607175476004422143352890939381345853201730850445192638885 | 130 |
UVM_FATAL @ 10168421899 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x25167f84, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10168421899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|