Simulation Results: pwm

 
21/12/2025 00:05:28 sha: af01fe4 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.79 %
  • code
  • 96.70 %
  • assert
  • 98.00 %
  • func
  • 98.68 %
  • block
  • 99.66 %
  • line
  • 99.74 %
  • branch
  • 99.49 %
  • toggle
  • 90.87 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
pwm_smoke 5.000s 525.954us 10 10 100.00
csr_hw_reset 5 5 100.00
pwm_csr_hw_reset 2.000s 20.587us 5 5 100.00
csr_rw 20 20 100.00
pwm_csr_rw 2.000s 70.239us 20 20 100.00
csr_bit_bash 5 5 100.00
pwm_csr_bit_bash 8.000s 5670.967us 5 5 100.00
csr_aliasing 5 5 100.00
pwm_csr_aliasing 3.000s 393.563us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
pwm_csr_mem_rw_with_rand_reset 2.000s 36.804us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
pwm_csr_rw 2.000s 70.239us 20 20 100.00
pwm_csr_aliasing 3.000s 393.563us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dutycycle 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
pulse 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
blink 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
heartbeat 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
resolution 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
multi_channel 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
polarity 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
phase 50 50 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
pwm_phase 70.000s 10942.815us 25 25 100.00
lowpower 25 25 100.00
pwm_rand_output 71.000s 21008.330us 25 25 100.00
perf 10 10 100.00
pwm_perf 74.000s 41995.728us 10 10 100.00
regwen 1 1 100.00
pwm_regwen 409.000s 10506.664us 1 1 100.00
stress_all 25 25 100.00
pwm_stress_all 251.000s 647364.261us 25 25 100.00
alert_test 50 50 100.00
pwm_alert_test 2.000s 14.857us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
pwm_tl_errors 4.000s 472.328us 20 20 100.00
tl_d_illegal_access 20 20 100.00
pwm_tl_errors 4.000s 472.328us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
pwm_csr_hw_reset 2.000s 20.587us 5 5 100.00
pwm_csr_rw 2.000s 70.239us 20 20 100.00
pwm_csr_aliasing 3.000s 393.563us 5 5 100.00
pwm_same_csr_outstanding 2.000s 26.242us 20 20 100.00
tl_d_partial_access 50 50 100.00
pwm_csr_hw_reset 2.000s 20.587us 5 5 100.00
pwm_csr_rw 2.000s 70.239us 20 20 100.00
pwm_csr_aliasing 3.000s 393.563us 5 5 100.00
pwm_same_csr_outstanding 2.000s 26.242us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
pwm_sec_cm 2.000s 44.236us 5 5 100.00
pwm_tl_intg_err 5.000s 4399.968us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
pwm_tl_intg_err 5.000s 4399.968us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
heartbeat_wrap 10 10 100.00
pwm_heartbeat_wrap 69.000s 45642.652us 10 10 100.00

Error Messages

   Test seed line log context