Simulation Results: aes

 
28/12/2025 00:10:32 sha: 3043786 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 96.44 %
  • code
  • 92.92 %
  • assert
  • 98.40 %
  • func
  • 98.00 %
  • block
  • 96.22 %
  • line
  • 97.38 %
  • branch
  • 90.70 %
  • toggle
  • 97.99 %
  • FSM
  • 85.62 %
Validation stages
V1
100.00%
V2
100.00%
V2S
95.62%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 64.714us 1 1 100.00
smoke 50 50 100.00
aes_smoke 14.000s 1373.768us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 3.000s 103.986us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 2.000s 84.551us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 7.000s 649.798us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 3.000s 417.923us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 143.691us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 2.000s 84.551us 20 20 100.00
aes_csr_aliasing 3.000s 417.923us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 14.000s 1373.768us 50 50 100.00
aes_config_error 13.000s 1296.315us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
key_length 150 150 100.00
aes_smoke 14.000s 1373.768us 50 50 100.00
aes_config_error 13.000s 1296.315us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
back2back 100 100 100.00
aes_stress 6.000s 845.695us 50 50 100.00
aes_b2b 37.000s 646.902us 50 50 100.00
backpressure 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 14.000s 1373.768us 50 50 100.00
aes_config_error 13.000s 1296.315us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 3.000s 68.348us 50 50 100.00
aes_config_error 13.000s 1296.315us 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
trigger_clear_test 50 50 100.00
aes_clear 14.000s 659.784us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 475.166us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
stress 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
sideload 100 100 100.00
aes_stress 6.000s 845.695us 50 50 100.00
aes_sideload 23.000s 1038.511us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 14.000s 626.203us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 149.000s 11340.768us 10 10 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 111.746us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 3.000s 76.652us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 3.000s 76.652us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 3.000s 103.986us 5 5 100.00
aes_csr_rw 2.000s 84.551us 20 20 100.00
aes_csr_aliasing 3.000s 417.923us 5 5 100.00
aes_same_csr_outstanding 3.000s 177.192us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 3.000s 103.986us 5 5 100.00
aes_csr_rw 2.000s 84.551us 20 20 100.00
aes_csr_aliasing 3.000s 417.923us 5 5 100.00
aes_same_csr_outstanding 3.000s 177.192us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 26.000s 2385.973us 50 50 100.00
fault_inject 662 700 94.57
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 577.913us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 3.000s 400.980us 20 20 100.00
aes_sec_cm 6.000s 2128.717us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 3.000s 400.980us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
sec_cm_main_config_sparse 216 220 98.18
aes_smoke 14.000s 1373.768us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
aes_core_fi 61.000s 10012.204us 66 70 94.29
sec_cm_gcm_config_sparse 100 100 100.00
aes_config_error 13.000s 1296.315us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 313.028us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 3.000s 65.271us 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 6.000s 845.695us 50 50 100.00
aes_sideload 23.000s 1038.511us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 3.000s 65.271us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 3.000s 65.271us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 3.000s 65.271us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 3.000s 65.271us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 3.000s 65.271us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 6.000s 845.695us 50 50 100.00
sec_cm_main_fsm_sparse 50 50 100.00
aes_fi 7.000s 262.544us 50 50 100.00
sec_cm_main_fsm_redun 712 750 94.93
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_cipher_fsm_sparse 50 50 100.00
aes_fi 7.000s 262.544us 50 50 100.00
sec_cm_cipher_fsm_redun 662 700 94.57
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
sec_cm_cipher_ctr_redun 338 350 96.57
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
sec_cm_ctr_fsm_sparse 50 50 100.00
aes_fi 7.000s 262.544us 50 50 100.00
sec_cm_ctr_fsm_redun 374 400 93.50
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_ctrl_sparse 712 750 94.93
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 26.000s 1581.935us 50 50 100.00
sec_cm_main_fsm_local_esc 712 750 94.93
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_cipher_fsm_local_esc 712 750 94.93
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_ctr_fsm_local_esc 374 400 93.50
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_ctr_fi 3.000s 57.702us 50 50 100.00
sec_cm_data_reg_local_esc 662 700 94.57
aes_fi 7.000s 262.544us 50 50 100.00
aes_control_fi 61.000s 10004.714us 274 300 91.33
aes_cipher_fi 33.000s 10006.432us 338 350 96.57
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 24.000s 911.894us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 102157745135144608100996620474858842249029856277848312631178965768807125794950 265
UVM_ERROR @ 619069029 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 619069029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 65285743343413759076343905218089077544439250517511720667577968860663597240157 173
UVM_ERROR @ 2164827718 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2164827718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 5580547067948120612794192568449953159901673853249403271653010462151310144964 193
UVM_ERROR @ 463933579 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 463933579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 58755023180460718841871846968923458502468614736430867512244287380820707584667 230
UVM_FATAL @ 76848826 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 76848826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 88344513459699426757322783627865797765942642929825436832231232028525117879022 553
UVM_FATAL @ 3248287432 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 3248287432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 75432720938615783923444825321652951464829296540869556170168385633541104375627 698
UVM_FATAL @ 1303571108 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1303571108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 45644952556867844566121747290142058222929017787919148379496674452434209593541 305
UVM_ERROR @ 386944857 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 386944857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 115703700776937815406637954294613498075750332421506737438070359497784536151626 334
UVM_ERROR @ 172269127 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 172269127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 62374851029402569444778896625890729455700022163047929958080670847373527435058 409
UVM_ERROR @ 911894263 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 911894263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 51393761988573788252032346736494848305023940612579818744469377539938388277505 143
UVM_FATAL @ 10017548204 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10017548204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 71072112529845788765405904879056374459547800934049648709111936603135876809331 146
UVM_FATAL @ 10016248310 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016248310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 74176606606052781275723777309847442576320718631169936082656007009574596991193 135
UVM_FATAL @ 10006925692 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006925692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 92445994333340262256575388916185946835229897265534871796607566434763145390266 143
UVM_FATAL @ 10012203847 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012203847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 28619193916036672158024196753223308341329298595559898432051002625833294190209 228
UVM_FATAL @ 1628311474 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1628311474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 87810339590101648463757749594182386823703264022148106913263936611486086599080 132
UVM_FATAL @ 10027174679 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027174679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 64922269455234685653327020421716116821053300015577969595109886348666593150146 143
UVM_FATAL @ 10005173961 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005173961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 85641385530314425322544651972403352336256525555619279139713682455091003120369 137
UVM_FATAL @ 10019918138 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019918138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 46321675927053425384405124165402113410852215627931107461606605085760920840805 139
UVM_FATAL @ 10071003625 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10071003625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 76505755022643149553148391096172884692133935138410521294561944243491107135483 143
UVM_FATAL @ 10017105261 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10017105261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 59741064454874918731022851456169274079139747851252115638026637984797421584792 137
UVM_FATAL @ 10051593617 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10051593617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 113549630279722910640704065439694922001263513150335455371688396628337549639658 147
UVM_FATAL @ 10129663592 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10129663592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 359078500212116556053410390004694461771712422325583730915432855817793637268 138
UVM_FATAL @ 10004714475 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004714475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 114984917792033876717105499746348136899860850371223519162085377804348691070815 133
UVM_FATAL @ 10008478922 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008478922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 6549993281430982422867715780328788879588848390948796732322797353177006213863 139
UVM_FATAL @ 10044948660 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10044948660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 114911359815677487255557164918635322030335883993646608861952886063221733862164 132
UVM_FATAL @ 10050693028 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10050693028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 65833931266276598583631579436246864890018018720974665770851876832472784527551 139
UVM_FATAL @ 10008601473 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008601473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 96132907772924043978493893640226423658499178071029290897027957795681020038264 135
UVM_FATAL @ 10005222908 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005222908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 17654342747652093581271458303748764321128934573750647423970462560704841629149 136
UVM_FATAL @ 10023388593 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10023388593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17745695329915028378563446149016224671200288895511832407818234998916481250919 140
UVM_FATAL @ 10070385383 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10070385383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 79338525999137950648041758088614513562824433000339734834369511126553523102737 138
UVM_FATAL @ 10011464366 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011464366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 114004312557233980089319335658578344935893160623819703433997963509912119551334 140
UVM_FATAL @ 10250988086 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10250988086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 90100332224910478654746726611273665451291472835761930124970217201358934337805 140
UVM_FATAL @ 10019314308 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019314308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 2290838255253290601865775517070908140674661205960130562176806441686184647331 141
UVM_FATAL @ 10006432036 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006432036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 46236523242203094280204056987446897503676900229482835761394147575188287416397 142
UVM_FATAL @ 10007727459 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007727459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_control_fi 66237163263986714707575158416303965594380187880417484110689269435147387218289 None
Job timed out after 1 minutes
aes_control_fi 112204578946168686693527227524374837833772350773971714209098550644738565940460 None
Job timed out after 1 minutes
aes_cipher_fi 49770510831932705671946937679982805674007809534181677010095316130352901955653 None
Job timed out after 1 minutes
aes_control_fi 77571109674936623758689039462669964077101335153369229247995814187333869378497 None
Job timed out after 1 minutes
aes_control_fi 3965193534371163329439851595432861492926643001106672939584704459415363873506 None
Job timed out after 1 minutes
aes_control_fi 33931068047846559090932143867162303206803983716912442328872212433069117074728 None
Job timed out after 1 minutes
aes_control_fi 104042313627149830005196243602433660134977760880392459103292117939400831134694 None
Job timed out after 1 minutes
aes_control_fi 109032692778391872754413982460565446024389587777317007957175219934751117636866 None
Job timed out after 1 minutes
aes_control_fi 83430751804188244118503099723782598271327066783691509201587100880664239419213 None
Job timed out after 1 minutes
aes_control_fi 88001331404398836263694981247087832471087603170895664421297095888324840087413 None
Job timed out after 1 minutes
aes_control_fi 93384422747089538008907185352545234853851141283224676155487941128057520413300 None
Job timed out after 1 minutes
aes_cipher_fi 56755674390779098829430227002407780466990046757138488252023163571361181619633 None
Job timed out after 1 minutes
aes_cipher_fi 39664410606428760210382993562267156665964542181584054687985720199387439325361 None
Job timed out after 1 minutes
aes_control_fi 108718638973588348591711769164584586368367230721414119153217409995423200547050 None
Job timed out after 1 minutes
aes_control_fi 93116943044608976522285457500438547247901066469201870375048113735193094801830 None
Job timed out after 1 minutes
aes_cipher_fi 25555578382898302405289004966394692704625878829623477411981986163555062338756 None
Job timed out after 1 minutes
aes_control_fi 115145840431142400749453812241116736325737899000844648977062861598310297908897 None
Job timed out after 1 minutes
aes_cipher_fi 63265289959257453489051641751262289706581932351497842103340332677459950695410 None
Job timed out after 1 minutes