Simulation Results: pwm

 
28/12/2025 00:10:32 sha: 3043786 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.83 %
  • code
  • 96.80 %
  • assert
  • 98.00 %
  • func
  • 98.68 %
  • block
  • 99.76 %
  • line
  • 99.85 %
  • branch
  • 99.68 %
  • toggle
  • 90.87 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
pwm_smoke 6.000s 557.563us 10 10 100.00
csr_hw_reset 5 5 100.00
pwm_csr_hw_reset 2.000s 32.106us 5 5 100.00
csr_rw 20 20 100.00
pwm_csr_rw 2.000s 42.007us 20 20 100.00
csr_bit_bash 5 5 100.00
pwm_csr_bit_bash 8.000s 677.227us 5 5 100.00
csr_aliasing 5 5 100.00
pwm_csr_aliasing 2.000s 47.769us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
pwm_csr_mem_rw_with_rand_reset 2.000s 34.174us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
pwm_csr_rw 2.000s 42.007us 20 20 100.00
pwm_csr_aliasing 2.000s 47.769us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dutycycle 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
pulse 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
blink 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
heartbeat 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
resolution 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
multi_channel 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
polarity 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
phase 50 50 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
pwm_phase 72.000s 15673.778us 25 25 100.00
lowpower 25 25 100.00
pwm_rand_output 70.000s 21773.667us 25 25 100.00
perf 10 10 100.00
pwm_perf 74.000s 41996.690us 10 10 100.00
regwen 1 1 100.00
pwm_regwen 185.000s 40390.821us 1 1 100.00
stress_all 25 25 100.00
pwm_stress_all 211.000s 296840.165us 25 25 100.00
alert_test 50 50 100.00
pwm_alert_test 2.000s 110.686us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
pwm_tl_errors 5.000s 539.459us 20 20 100.00
tl_d_illegal_access 20 20 100.00
pwm_tl_errors 5.000s 539.459us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
pwm_csr_hw_reset 2.000s 32.106us 5 5 100.00
pwm_csr_rw 2.000s 42.007us 20 20 100.00
pwm_csr_aliasing 2.000s 47.769us 5 5 100.00
pwm_same_csr_outstanding 3.000s 96.961us 20 20 100.00
tl_d_partial_access 50 50 100.00
pwm_csr_hw_reset 2.000s 32.106us 5 5 100.00
pwm_csr_rw 2.000s 42.007us 20 20 100.00
pwm_csr_aliasing 2.000s 47.769us 5 5 100.00
pwm_same_csr_outstanding 3.000s 96.961us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
pwm_sec_cm 2.000s 306.311us 5 5 100.00
pwm_tl_intg_err 4.000s 124.190us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
pwm_tl_intg_err 4.000s 124.190us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
heartbeat_wrap 10 10 100.00
pwm_heartbeat_wrap 62.000s 45639.205us 10 10 100.00

Error Messages

   Test seed line log context