Simulation Results: sysrst_ctrl

 
28/12/2025 00:10:32 sha: 3043786 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 94.00 %
  • code
  • 98.79 %
  • assert
  • 98.47 %
  • func
  • 84.73 %
  • line
  • 99.52 %
  • branch
  • 99.59 %
  • cond
  • 98.06 %
  • toggle
  • 100.00 %
  • FSM
  • 96.79 %
Validation stages
V1
100.00%
V2
96.84%
V2S
100.00%
V3
96.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
sysrst_ctrl_smoke 8.520s 2113.288us 50 50 100.00
input_output_inverted 50 50 100.00
sysrst_ctrl_in_out_inverted 11.420s 2461.596us 50 50 100.00
combo_detect_ec_rst 5 5 100.00
sysrst_ctrl_combo_detect_ec_rst 6.180s 2214.931us 5 5 100.00
combo_detect_ec_rst_with_pre_cond 5 5 100.00
sysrst_ctrl_combo_detect_ec_rst_with_pre_cond 6.390s 2523.782us 5 5 100.00
csr_hw_reset 5 5 100.00
sysrst_ctrl_csr_hw_reset 15.050s 4009.643us 5 5 100.00
csr_rw 20 20 100.00
sysrst_ctrl_csr_rw 8.260s 2032.861us 20 20 100.00
csr_bit_bash 5 5 100.00
sysrst_ctrl_csr_bit_bash 141.140s 38564.339us 5 5 100.00
csr_aliasing 5 5 100.00
sysrst_ctrl_csr_aliasing 10.410s 3015.729us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
sysrst_ctrl_csr_mem_rw_with_rand_reset 8.750s 2045.929us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
sysrst_ctrl_csr_rw 8.260s 2032.861us 20 20 100.00
sysrst_ctrl_csr_aliasing 10.410s 3015.729us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
combo_detect 49 50 98.00
sysrst_ctrl_combo_detect 456.850s 198138.656us 49 50 98.00
combo_detect_with_pre_cond 97 100 97.00
sysrst_ctrl_combo_detect_with_pre_cond 522.790s 233311.393us 97 100 97.00
auto_block_key_outputs 50 50 100.00
sysrst_ctrl_auto_blk_key_output 675.640s 275918.813us 50 50 100.00
keyboard_input_triggered_interrupt 48 50 96.00
sysrst_ctrl_edge_detect 748.520s 905445.519us 48 50 96.00
pin_output_keyboard_inversion_control 50 50 100.00
sysrst_ctrl_pin_override_test 10.470s 2512.011us 50 50 100.00
pin_input_value_accessibility 50 50 100.00
sysrst_ctrl_pin_access_test 8.700s 2116.175us 50 50 100.00
ec_power_on_reset 49 50 98.00
sysrst_ctrl_ec_pwr_on_rst 1569.940s 1158249.869us 49 50 98.00
flash_write_protect_output 50 50 100.00
sysrst_ctrl_flash_wr_prot_out 11.000s 2614.908us 50 50 100.00
ultra_low_power_test 36 50 72.00
sysrst_ctrl_ultra_low_pwr 423.730s 1544597.005us 36 50 72.00
sysrst_ctrl_feature_disable 2 2 100.00
sysrst_ctrl_feature_disable 82.130s 40970.526us 2 2 100.00
stress_all 46 50 92.00
sysrst_ctrl_stress_all 2779.430s 1057123.323us 46 50 92.00
alert_test 50 50 100.00
sysrst_ctrl_alert_test 8.470s 2011.094us 50 50 100.00
intr_test 50 50 100.00
sysrst_ctrl_intr_test 8.710s 2017.535us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
sysrst_ctrl_tl_errors 8.490s 2021.638us 20 20 100.00
tl_d_illegal_access 20 20 100.00
sysrst_ctrl_tl_errors 8.490s 2021.638us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
sysrst_ctrl_csr_hw_reset 15.050s 4009.643us 5 5 100.00
sysrst_ctrl_csr_rw 8.260s 2032.861us 20 20 100.00
sysrst_ctrl_csr_aliasing 10.410s 3015.729us 5 5 100.00
sysrst_ctrl_same_csr_outstanding 37.150s 10400.731us 20 20 100.00
tl_d_partial_access 50 50 100.00
sysrst_ctrl_csr_hw_reset 15.050s 4009.643us 5 5 100.00
sysrst_ctrl_csr_rw 8.260s 2032.861us 20 20 100.00
sysrst_ctrl_csr_aliasing 10.410s 3015.729us 5 5 100.00
sysrst_ctrl_same_csr_outstanding 37.150s 10400.731us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
sysrst_ctrl_tl_intg_err 131.510s 42507.090us 20 20 100.00
sysrst_ctrl_sec_cm 59.660s 42022.099us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
sysrst_ctrl_tl_intg_err 131.510s 42507.090us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 48 50 96.00
sysrst_ctrl_stress_all_with_rand_reset 20.040s 6388.224us 48 50 96.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error
sysrst_ctrl_ultra_low_pwr 110828946761065868229486490885264707724080989540800312924565883564679108273947 648
UVM_ERROR @ 6753280936 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 6753447602 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 6753447602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all 56253188196223613677316994134884703707218184198481748158011298992939874050300 650
UVM_ERROR @ 381317240173 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 381317320173 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 381317320173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 3981235185952769618601954161516753055091069659086884948128472365951498530776 648
UVM_ERROR @ 3743300710 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 3743331960 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 3743331960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 28709329366324299690701210087477485426161142405889430824292765048831233088760 647
UVM_ERROR @ 3999192199 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 3999232199 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 3999232199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_edge_detect 105486376545447389583683708157943980198212871884428201744879521488102299544854 655
UVM_ERROR @ 5625264078 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 5625347412 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 5625347412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 17864595836759085730936403003386772248877599901600058867595370347771411936572 647
UVM_ERROR @ 5224184126 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 5224204126 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 5224204126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 114698783343924529037820536912962236014205968938107462155680519938752567735104 647
UVM_ERROR @ 4350415922 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 4350446226 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 4350446226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 26194286314084467330298709588403415128992473608668724348727596794393393721213 647
UVM_ERROR @ 5138575685 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 5138655685 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 5138655685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 73008992145748060840280125804925426395561292285262229645589736551552351304381 648
UVM_ERROR @ 3189696874 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 3189737690 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 3189737690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 337448120483926096042038805141652587319677887805463857892048419648684674926 647
UVM_ERROR @ 6437778527 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 6438178527 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 6438178527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 3970326006111957882267733132345773397616067905493975434809525527772434186334 649
UVM_ERROR @ 6900766894 ps: (cip_base_scoreboard.sv:255) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault has unexpected timeout error
UVM_ERROR @ 6900790815 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 6900790815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (sysrst_ctrl_ultra_low_pwr_vseq.sv:184) [sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == * (* [*] vs * [*])
sysrst_ctrl_ultra_low_pwr 12546090955010778409334743249480128574043758908674083910381619049764804854628 648
UVM_ERROR @ 2542838712 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:184) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 1 (0 [0x0] vs 1 [0x1])
UVM_ERROR @ 2543235092 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sysrst_ctrl_reg_block.wkup_status reset value: 0x0
UVM_INFO @ 2543235092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (sysrst_ctrl_combo_detect_vseq.sv:239) [sysrst_ctrl_combo_detect_vseq] Check failed rdata == intr_actions (* [*] vs * [*])
sysrst_ctrl_combo_detect 95891249738524340909087713141930348614571877914312359697030469049416258168156 681
UVM_ERROR @ 97266383935 ps: (sysrst_ctrl_combo_detect_vseq.sv:239) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_vseq] Check failed rdata == intr_actions (1 [0x1] vs 3 [0x3])
UVM_ERROR @ 97291384360 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (2 [0x2] vs 0 [0x0]) Regname: sysrst_ctrl_reg_block.combo_intr_status reset value: 0x0
UVM_INFO @ 97291384360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
sysrst_ctrl_ultra_low_pwr 77613622621893485479290509559645509563522351444569048918592286321784895338803 647
UVM_ERROR @ 3528502432 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_ERROR @ 4771002432 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 0 (1 [0x1] vs 0 [0x0])
UVM_INFO @ 4771002432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all_with_rand_reset 14269086828892439441898063899282513670738239646638491678045541499359394177276 712
UVM_ERROR @ 39352391160 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_ERROR @ 39934891160 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 0 (1 [0x1] vs 0 [0x0])
UVM_INFO @ 39934891160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 56928993018419155831250690000039223636524536080939894114115233869020418830509 647
UVM_ERROR @ 3237055858 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_ERROR @ 4989555858 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 0 (1 [0x1] vs 0 [0x0])
UVM_INFO @ 4989555858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 66833301526934228305155773859272934389752696045818373280872858341626898981844 647
UVM_ERROR @ 2397999411 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_ERROR @ 4750499411 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 0 (1 [0x1] vs 0 [0x0])
UVM_INFO @ 4750499411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_ultra_low_pwr 72183347804498573560265427658104570685847671837758380522957957115410921659951 647
UVM_ERROR @ 2808548454 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_ERROR @ 3701048454 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed cfg.vif.z3_wakeup == 0 (1 [0x1] vs 0 [0x0])
UVM_INFO @ 3701048454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all 83198991411672116140353446194071584012644285505011941550615032071956872971611 684
UVM_ERROR @ 100941318110 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_INFO @ 101063818110 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:81) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] z3_wakeup assertion expected for a H2L transition on pwrb_in_i
UVM_INFO @ 102663818110 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:235) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Disable Z3 wakeup check
UVM_INFO @ 102681955926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all 84068574750386591162529833814827260677656493010422069981939984387227570348946 656
UVM_ERROR @ 11146358376 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:113) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Check failed (exp_z3_wakeup) 
UVM_INFO @ 11413858376 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:95) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] z3_wakeup assertion expected for a L2H transition on lid_open_i
UVM_INFO @ 13918858376 ps: (sysrst_ctrl_ultra_low_pwr_vseq.sv:235) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ultra_low_pwr_vseq] Disable Z3 wakeup check
UVM_INFO @ 14028093601 ps: (sysrst_ctrl_stress_all_vseq.sv:52) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_stress_all_vseq] body: executing sequence sysrst_ctrl_common_vseq
UVM_INFO @ 16024091605 ps: (cip_base_vseq.sv:775) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_common_vseq] Running intr test iteration 1/6
UVM_FATAL (cip_base_vseq.sv:885) [sysrst_ctrl_edge_detect_vseq] timeout occurred!
sysrst_ctrl_edge_detect 53421772016481161818021198042761951798680433177542647782279677249212801260045 659
UVM_FATAL @ 14092824588 ps: (cip_base_vseq.sv:885) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_edge_detect_vseq] timeout occurred!
UVM_INFO @ 14092824588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (sysrst_ctrl_base_vseq.sv:67) [sysrst_ctrl_ec_pwr_on_rst_vseq] time out waiting for ec_rst == *
sysrst_ctrl_ec_pwr_on_rst 48558992550080699465484688955707901347094181100879395023648971785876677601218 647
UVM_FATAL @ 2491747252 ps: (sysrst_ctrl_base_vseq.sv:67) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ec_pwr_on_rst_vseq] time out waiting for ec_rst == 0
UVM_INFO @ 2491747252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all 13734175825377311134564575705628250916009293366582955167226459878800730132091 648
UVM_FATAL @ 5148825370 ps: (sysrst_ctrl_base_vseq.sv:67) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ec_pwr_on_rst_vseq] time out waiting for ec_rst == 0
UVM_INFO @ 5148825370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_stress_all_with_rand_reset 55480781144721030540377377375189724099206536627247392178268790524306440717831 711
UVM_FATAL @ 13143024766 ps: (sysrst_ctrl_base_vseq.sv:67) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_ec_pwr_on_rst_vseq] time out waiting for ec_rst == 0
UVM_INFO @ 13143024766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:543) [sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.bat_disable == * (* [*] vs * [*])
sysrst_ctrl_combo_detect_with_pre_cond 28679121822519008085271113436916806968575231129661025612065857908468508974349 689
UVM_ERROR @ 93720082432 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:543) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.bat_disable == 1 (0 [0x0] vs 1 [0x1])
UVM_ERROR @ 93720082432 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:551) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.rst_req == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 93720082432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_combo_detect_with_pre_cond 105230963256919196287041760753320704583416582204836139325282591070111862800763 696
UVM_ERROR @ 55810292264 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:543) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.bat_disable == 1 (0 [0x0] vs 1 [0x1])
UVM_ERROR @ 55810292264 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:551) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.rst_req == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 55810292264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
sysrst_ctrl_combo_detect_with_pre_cond 29836938040002617884139782111312848978350360354405788375736775049986759189919 677
UVM_ERROR @ 51543202136 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:543) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.bat_disable == 1 (0 [0x0] vs 1 [0x1])
UVM_ERROR @ 51543202136 ps: (sysrst_ctrl_combo_detect_with_pre_cond_vseq.sv:559) [uvm_test_top.env.virtual_sequencer.sysrst_ctrl_combo_detect_with_pre_cond_vseq] Check failed cfg.vif.wkup_req == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 51543202136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---