| V1 |
|
100.00% |
| V2 |
|
99.69% |
| V2S |
|
94.58% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 2.000s | 57.584us | 1 | 1 | 100.00 | |
| smoke | 50 | 50 | 100.00 | |||
| aes_smoke | 3.000s | 93.121us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| aes_csr_hw_reset | 6.000s | 115.204us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| aes_csr_rw | 6.000s | 59.662us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| aes_csr_bit_bash | 11.000s | 9546.098us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| aes_csr_aliasing | 5.000s | 175.423us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 4.000s | 97.352us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| aes_csr_rw | 6.000s | 59.662us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 5.000s | 175.423us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 150 | 150 | 100.00 | |||
| aes_smoke | 3.000s | 93.121us | 50 | 50 | 100.00 | |
| aes_config_error | 3.000s | 91.677us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| key_length | 150 | 150 | 100.00 | |||
| aes_smoke | 3.000s | 93.121us | 50 | 50 | 100.00 | |
| aes_config_error | 3.000s | 91.677us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| back2back | 100 | 100 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| aes_b2b | 7.000s | 133.866us | 50 | 50 | 100.00 | |
| backpressure | 50 | 50 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| multi_message | 199 | 200 | 99.50 | |||
| aes_smoke | 3.000s | 93.121us | 50 | 50 | 100.00 | |
| aes_config_error | 3.000s | 91.677us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| failure_test | 149 | 150 | 99.33 | |||
| aes_man_cfg_err | 3.000s | 99.296us | 50 | 50 | 100.00 | |
| aes_config_error | 3.000s | 91.677us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| trigger_clear_test | 50 | 50 | 100.00 | |||
| aes_clear | 7.000s | 503.960us | 50 | 50 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 5.000s | 2896.925us | 1 | 1 | 100.00 | |
| reset_recovery | 49 | 50 | 98.00 | |||
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| stress | 50 | 50 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| sideload | 100 | 100 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| aes_sideload | 4.000s | 582.410us | 50 | 50 | 100.00 | |
| deinitialization | 50 | 50 | 100.00 | |||
| aes_deinit | 4.000s | 565.511us | 50 | 50 | 100.00 | |
| stress_all | 9 | 10 | 90.00 | |||
| aes_stress_all | 18.000s | 1587.484us | 9 | 10 | 90.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| aes_alert_test | 3.000s | 54.226us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 8.000s | 283.374us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 8.000s | 283.374us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 6.000s | 115.204us | 5 | 5 | 100.00 | |
| aes_csr_rw | 6.000s | 59.662us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 5.000s | 175.423us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 5.000s | 134.912us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 6.000s | 115.204us | 5 | 5 | 100.00 | |
| aes_csr_rw | 6.000s | 59.662us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 5.000s | 175.423us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 5.000s | 134.912us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 50 | 50 | 100.00 | |||
| aes_reseed | 6.000s | 394.542us | 50 | 50 | 100.00 | |
| fault_inject | 654 | 700 | 93.43 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 7.000s | 289.994us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 8.000s | 769.090us | 20 | 20 | 100.00 | |
| aes_sec_cm | 4.000s | 1841.593us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| aes_tl_intg_err | 8.000s | 769.090us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 49 | 50 | 98.00 | |||
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 216 | 220 | 98.18 | |||
| aes_smoke | 3.000s | 93.121us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| aes_core_fi | 282.000s | 10014.422us | 67 | 70 | 95.71 | |
| sec_cm_gcm_config_sparse | 100 | 100 | 100.00 | |||
| aes_config_error | 3.000s | 91.677us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 6.000s | 153.474us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 100 | 100 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 100 | 100 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| aes_sideload | 4.000s | 582.410us | 50 | 50 | 100.00 | |
| sec_cm_key_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| sec_cm_key_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 81.933us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_key_sca | 50 | 50 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| sec_cm_key_masking | 50 | 50 | 100.00 | |||
| aes_stress | 5.000s | 225.045us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_sparse | 48 | 50 | 96.00 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| sec_cm_main_fsm_redun | 703 | 750 | 93.73 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_sparse | 48 | 50 | 96.00 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| sec_cm_cipher_fsm_redun | 654 | 700 | 93.43 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| sec_cm_cipher_ctr_redun | 331 | 350 | 94.57 | |||
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| sec_cm_ctr_fsm_sparse | 48 | 50 | 96.00 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| sec_cm_ctr_fsm_redun | 372 | 400 | 93.00 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_ctrl_sparse | 703 | 750 | 93.73 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_global_esc | 49 | 50 | 98.00 | |||
| aes_alert_reset | 3.000s | 293.900us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_local_esc | 703 | 750 | 93.73 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_local_esc | 703 | 750 | 93.73 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_ctr_fsm_local_esc | 372 | 400 | 93.00 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_ctr_fi | 3.000s | 61.659us | 49 | 50 | 98.00 | |
| sec_cm_data_reg_local_esc | 654 | 700 | 93.43 | |||
| aes_fi | 3.000s | 147.642us | 48 | 50 | 96.00 | |
| aes_control_fi | 47.000s | 200000.000us | 275 | 300 | 91.67 | |
| aes_cipher_fi | 24.000s | 10035.991us | 331 | 350 | 94.57 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 26.000s | 19763.304us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_stress_all_with_rand_reset | 76183484870466925605545255971406224521121963870091766993280333444612755863933 | 334 |
UVM_ERROR @ 265535484 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 265535484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 18557448995360202009663619320832366367028510243491148842270053010667493366159 | 1376 |
UVM_ERROR @ 484698150 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 484698150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 84322345392491301201727159885150808071962528543377876690336340933909365142344 | 338 |
UVM_ERROR @ 158444473 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 158444473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 89497161023224560255904598190333841621408350137617748824731452057031265075404 | 647 |
UVM_ERROR @ 247682396 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 247682396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 86382758276517476494981149711986537760330666122541257924518870797613667554729 | 368 |
UVM_ERROR @ 19763304240 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 19763304240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 7188563583776877840776146573531923564447818315959897977983629556258621044080 | 518 |
UVM_ERROR @ 494052537 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 494052537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 2864709300075979617329067393734046612125241181717127412126271626418375077942 | 745 |
UVM_ERROR @ 857673156 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 857673156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 3772978028532459540054919083111815205029288235143975227159230967074593082528 | 1173 |
UVM_ERROR @ 3235830911 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 3235830911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 10820562275118182110017972767740998554877220087559612195568061204848587243860 | 644 |
UVM_ERROR @ 622274654 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 622274654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | ||||
| aes_cipher_fi | 18964871679669402512910151035766208442374796041455319744604879413278334709104 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 13255322249524830031631794251141878067233792183931544211413951833650555037813 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 60803215239535175609054689258717755732811549753661392698526242370072261809587 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 51074863518503052842911458251380372137089544678390964752089198997828640506807 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 56170105530349427301025792997544013809854902944549039213387214317993981906804 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 13062574753243321019852621294593175799081114347808163949972988370953154255867 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 95003646874461494708813550146632466000724462316242069835289619130479139401760 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 86753032596676231552326302074671161879439114342642078344099227884262306701949 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 366546910986269723983321208494349275261161782719251826132210296231002022774 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 92126690251089638039619461226683398332923047399183280869160081296638360526376 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 15756548136872122917262045024496220671120963881910290367337046824945922863822 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 80139887046448244813089573511639172439796222150827685710074549658201640657688 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 58778682292648201938343838022692846814504333695413570492911376538914128240363 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 99599160629072541443463933968983639363284447221112339996012836833233618505772 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 101261066884309219884557557621877673204848461514976862469465598080243687339361 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 36171118648962216930526120866683346686434180173483398248334871860801293307087 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 32974032050350842373340148062353133300395160691695474375848923257226382485954 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 43911039981183730809918325031908948664108823897207699385463447320903509260151 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 14820304549724138569246156064499542248031204646598128055556516018115824288327 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 91246470747788568575518123763048693574891534912040323125890304938774659800856 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 97900120106582511488411292953941215732418808379180459479496936004794823867813 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 86779739551632415382982462143428208217722816698692515041053325987226472001646 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 40912830799862023127920316742384883035448850429924512785600193693841547561249 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 112704143195389984872530465088780332442410808205369493572208636253945263455087 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 58908154154927543743459288332784533155055628112016498356704390421724319078043 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 37528948511525695310672268016299984786110874215886298965339949697015950689383 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 79031987402957487955662533377149532630949329551043996537485464249231570777095 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 80628404264907278320385278520694554331886073113581707071418367899028798270084 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 78015744672901292590827426589181153908383217765120437174473649504355094050750 | None |
Job timed out after 1 minutes
|
|
| UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | ||||
| aes_stress_all_with_rand_reset | 76524971865596751001698161857290639958870716710945221437859558964395622559420 | 136 |
UVM_ERROR @ 823071691 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 823071691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1129): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) | ||||
| aes_stress_all | 90350834354215513096346033668252024823358593810447280993108512317867086872037 | 11595 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 127087756 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 127052042 PS)
UVM_ERROR @ 127087756 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 127087756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_fi | 28568763585504915175122063882006081466211648829305575050277438328642099413330 | 2651 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 16136095 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 16116095 PS)
UVM_ERROR @ 16136095 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 16136095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_fi | 4045405040259141821204362900730372382011617501935373083775789179835313287993 | 3022 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 24411379 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 24382808 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1135): (time 24411379 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 24382808 PS)
UVM_ERROR @ 24411379 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) | ||||
| aes_core_fi | 96993311763132791367383290501577106785035570902257005618852398957855044304660 | 134 |
UVM_FATAL @ 10022841594 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0xfe77a484, Comparison=CompareOpEq, exp_data=0x0, call_count=9)
UVM_INFO @ 10022841594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1135): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS) | ||||
| aes_alert_reset | 82400346443632615418972452561065440098182883040392736531082817045812142391859 | 780 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1135): (time 16154990 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 16134990 PS)
UVM_ERROR @ 16154990 ps: (aes_core.sv:1135) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 16154990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | ||||
| aes_control_fi | 93700111220896325490054909464529085673962868179167454799662003632920914853739 | 146 |
UVM_FATAL @ 10005360418 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005360418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 11107506287382544894237100278802637935116617312914395623016096386083672045173 | 142 |
UVM_FATAL @ 10010325247 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010325247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 21125558587408273856325646249573380867143247760007520769368325136719187560642 | 140 |
UVM_FATAL @ 10009225472 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009225472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 56139450503070526075602657554941088425264390910588034856177738803469079715455 | 143 |
UVM_FATAL @ 10004213669 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004213669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 82592030503326076535787399090367963267934238245796708253409296784290412238919 | 140 |
UVM_FATAL @ 10027568920 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027568920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 29991084330756803056325746324566852315124360605233272282088927410789138921080 | 145 |
UVM_FATAL @ 10014175488 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014175488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 79002703305270285404470717105599583113167729273877014369377127628661452574280 | 138 |
UVM_FATAL @ 10040955754 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10040955754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 24254971613929241807489203565878026623368161587184681555826130979070260622033 | 136 |
UVM_FATAL @ 10008164323 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008164323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_ctr_fi | 102190076564392012996064331104589718259407621088669048165170261262957421135549 | 140 |
UVM_ERROR @ 36664155 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.m_tl_agent_aes_reg_block.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.m_tl_agent_aes_reg_block.sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 36664155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) | ||||
| aes_core_fi | 68317452570255873346971955121024794439697075551744998559436983564985462236609 | 134 |
UVM_FATAL @ 10020516064 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x938a8c84, Comparison=CompareOpEq, exp_data=0x0, call_count=8)
UVM_INFO @ 10020516064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) | ||||
| aes_cipher_fi | 36780196026179605140174449940437637401109254920346873104570444710327108893289 | 133 |
UVM_FATAL @ 10035991091 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x72327784, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10035991091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) | ||||
| aes_core_fi | 406838283606262259657828157982781239605934164567860866853553681006276465512 | 139 |
UVM_FATAL @ 10014422319 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0xe6bc3584, Comparison=CompareOpEq, exp_data=0x0, call_count=11)
UVM_INFO @ 10014422319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| aes_control_fi | 73501133174022786031377280913471618572267335425832415145169196869618271744161 | 143 |
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) | ||||
| aes_cipher_fi | 25767769716854122019564078233296762437875198574850286116653134136927386857126 | 130 |
UVM_FATAL @ 10036592448 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x18bc9184, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10036592448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | ||||
| aes_cipher_fi | 40829176917659796901228977747293853688060571070233950387589585946203989705996 | 137 |
UVM_FATAL @ 10011282369 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011282369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 100225965704098226070110710116411109488822007177748877421915971257562801318206 | 140 |
UVM_FATAL @ 10015458287 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015458287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 20607648972871454774983388918019118041845565769514919401248613420279181086800 | 138 |
UVM_FATAL @ 10014917413 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014917413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 94145836785456595875619423384396449275384880682967791341017697675466547076434 | 143 |
UVM_FATAL @ 10007369622 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007369622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|