Simulation Results: aes

 
11/01/2026 00:07:26 sha: 8eebaba json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.85 %
  • code
  • 88.81 %
  • assert
  • 98.13 %
  • func
  • 97.60 %
  • block
  • 92.82 %
  • line
  • 94.60 %
  • branch
  • 84.55 %
  • toggle
  • 97.99 %
  • FSM
  • 78.12 %
Validation stages
V1
100.00%
V2
99.77%
V2S
93.60%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 88.615us 1 1 100.00
smoke 50 50 100.00
aes_smoke 3.000s 164.896us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 30.000s 133.616us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 30.000s 323.545us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 32.000s 649.200us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 30.000s 103.876us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 30.000s 108.247us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 30.000s 323.545us 20 20 100.00
aes_csr_aliasing 30.000s 103.876us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 3.000s 164.896us 50 50 100.00
aes_config_error 4.000s 206.809us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
key_length 150 150 100.00
aes_smoke 3.000s 164.896us 50 50 100.00
aes_config_error 4.000s 206.809us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
back2back 100 100 100.00
aes_stress 3.000s 236.960us 50 50 100.00
aes_b2b 7.000s 651.743us 50 50 100.00
backpressure 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
multi_message 199 200 99.50
aes_smoke 3.000s 164.896us 50 50 100.00
aes_config_error 4.000s 206.809us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
failure_test 149 150 99.33
aes_man_cfg_err 3.000s 84.850us 50 50 100.00
aes_config_error 4.000s 206.809us 50 50 100.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
trigger_clear_test 50 50 100.00
aes_clear 4.000s 224.041us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 184.386us 1 1 100.00
reset_recovery 49 50 98.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
stress 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
sideload 100 100 100.00
aes_stress 3.000s 236.960us 50 50 100.00
aes_sideload 3.000s 149.994us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 3.000s 129.174us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 20.000s 1157.964us 10 10 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 99.322us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 31.000s 242.082us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 31.000s 242.082us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 30.000s 133.616us 5 5 100.00
aes_csr_rw 30.000s 323.545us 20 20 100.00
aes_csr_aliasing 30.000s 103.876us 5 5 100.00
aes_same_csr_outstanding 30.000s 138.864us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 30.000s 133.616us 5 5 100.00
aes_csr_rw 30.000s 323.545us 20 20 100.00
aes_csr_aliasing 30.000s 103.876us 5 5 100.00
aes_same_csr_outstanding 30.000s 138.864us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 3.000s 87.392us 50 50 100.00
fault_inject 643 700 91.86
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 30.000s 465.868us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 30.000s 130.486us 20 20 100.00
aes_sec_cm 4.000s 930.043us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 30.000s 130.486us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 49 50 98.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
sec_cm_main_config_sparse 217 220 98.64
aes_smoke 3.000s 164.896us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
aes_core_fi 33.000s 10002.867us 68 70 97.14
sec_cm_gcm_config_sparse 100 100 100.00
aes_config_error 4.000s 206.809us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 30.000s 272.031us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 3.000s 65.724us 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 3.000s 236.960us 50 50 100.00
aes_sideload 3.000s 149.994us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 3.000s 65.724us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 3.000s 65.724us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 3.000s 65.724us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 3.000s 65.724us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 3.000s 65.724us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 3.000s 236.960us 50 50 100.00
sec_cm_main_fsm_sparse 49 50 98.00
aes_fi 3.000s 539.224us 49 50 98.00
sec_cm_main_fsm_redun 693 750 92.40
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_cipher_fsm_sparse 49 50 98.00
aes_fi 3.000s 539.224us 49 50 98.00
sec_cm_cipher_fsm_redun 643 700 91.86
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
sec_cm_cipher_ctr_redun 317 350 90.57
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
sec_cm_ctr_fsm_sparse 49 50 98.00
aes_fi 3.000s 539.224us 49 50 98.00
sec_cm_ctr_fsm_redun 376 400 94.00
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_ctrl_sparse 693 750 92.40
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_main_fsm_global_esc 49 50 98.00
aes_alert_reset 4.000s 220.869us 49 50 98.00
sec_cm_main_fsm_local_esc 693 750 92.40
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_cipher_fsm_local_esc 693 750 92.40
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_ctr_fsm_local_esc 376 400 94.00
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_ctr_fi 3.000s 113.692us 50 50 100.00
sec_cm_data_reg_local_esc 643 700 91.86
aes_fi 3.000s 539.224us 49 50 98.00
aes_control_fi 37.000s 10003.375us 277 300 92.33
aes_cipher_fi 59.000s 10014.008us 317 350 90.57
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 29.000s 2563.166us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 60598433870777461180272816592556545563129516180834990430390221721955046101579 165
UVM_ERROR @ 2012744125 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2012744125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 75633293719416576663496127987800406043522046389334990329086903403118430851372 205
UVM_ERROR @ 2563165536 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2563165536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 75982081076984090299486393532619630889075283908081835914348493331028962403650 1620
UVM_ERROR @ 593874707 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 593874707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 13001536911069127287332958043673363820281557357870026302800847575678142200106 1235
UVM_ERROR @ 386335092 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 386335092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 59630071248689160696288523254571281914195512221585436526158712824274958552476 280
UVM_ERROR @ 186989654 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 186989654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 5785088777941291461080589777055676085532264894542119036506319376280145762113 1455
UVM_ERROR @ 900894148 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 900894148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 108253187974804901739203537507466489103448059463139472274710330941892375195001 163
UVM_FATAL @ 76171074 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 76171074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 41384454402476643963565389275319084167170830815498065548756476860918095006399 564
UVM_FATAL @ 460220889 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 460220889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 96898064822912322559794703484080646892166873408224183586419579606812828929512 141
UVM_FATAL @ 79512514 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 79512514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 87303692895695969028657463226722323168100248420121620017182599236354369917311 939
UVM_FATAL @ 2380269368 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 2380269368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1129): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS)
aes_fi 19352065775446939187034075270626813070217544381770754663549324504344924914510 2448
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 50271219 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 50199790 PS)
UVM_ERROR @ 50271219 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 50271219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_alert_reset 113938564212688153562350885488104499166509636427797893724801867098602614344869 965
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 14248715 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 14238298 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1135): (time 14248715 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 14238298 PS)
UVM_ERROR @ 14248715 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 13754340724603166699508393934614820270177679787299589083958577210554617691265 143
UVM_FATAL @ 10036710388 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10036710388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 27592272797975659447959149248875901639954420240931347702768723832622073579341 142
UVM_FATAL @ 10010856640 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010856640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 31404690099175986447024329923529656262813947982048181711655421740767517666447 140
UVM_FATAL @ 10018083441 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10018083441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 10338242745888415471303625935836248370751957193944652823398391225090434148940 142
UVM_FATAL @ 10003018838 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003018838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 8613015535060453154096149115628330826321032247127061767290868681960132741081 149
UVM_FATAL @ 10013843433 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013843433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 11595571042322022887665716535772677424849485521560377863753259682811878181306 145
UVM_FATAL @ 10003144707 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003144707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 98795065578141016750238838384514623583823858151480631844596310295098261904347 140
UVM_FATAL @ 10014230756 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014230756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 52768936147687765393001870463659420904373621385566921093346613899006005673980 135
UVM_FATAL @ 10011706596 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011706596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 61219997796725372736106119859262959341930667843394295850865687623354511234642 133
UVM_FATAL @ 10010815320 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010815320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 43230391118466840557938904366326346824413572010334400893163206796709255320269 147
UVM_FATAL @ 10008967994 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008967994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 91236471753419097690045297211404013228386322093270796331942393480074149630293 140
UVM_FATAL @ 10011493299 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011493299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41631603706607170019398738304380482148703870481956912549598451025934437852647 139
UVM_FATAL @ 10009629096 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009629096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 56891176864871796881465573186216766606673289490849801084929780015426507245031 142
UVM_FATAL @ 10002683695 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002683695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 68343646043845343639848651801649545015269247734186825028723890801455311159516 138
UVM_FATAL @ 10003236158 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003236158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 6061090644435226766914361480698236565233403455261195558415477247939524729783 144
UVM_FATAL @ 10007947815 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007947815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 39952723951717571325262018074431794323057841318049667089003279069786850798004 132
UVM_FATAL @ 10004410085 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004410085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 22048914804409005490174464054933476155715618639163484670722062131897518516202 135
UVM_FATAL @ 10053211877 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10053211877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 44204672700099487229469192875054590192803170049444985619665078429446704994512 139
UVM_FATAL @ 10012003742 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012003742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 92020432005681066280071452761494043854413426983547543859178290393735056552458 140
UVM_FATAL @ 10017461340 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10017461340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 27378494885566715147627569336650701630717412535999850394782556023086492704121 136
UVM_FATAL @ 10004369886 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004369886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 33191239428638778958125371994057058136375507345619319649841703651010894770367 136
UVM_FATAL @ 10003374770 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003374770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 80497022732034669396952091114570113191523967157518752340217682862019269705935 146
UVM_FATAL @ 10007356846 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007356846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_control_fi 72932842413395770235324948485606515398471009266520709374099595872852961839625 None
Job timed out after 1 minutes
aes_control_fi 83562653675302509458652319094843908792595846123919396666944689710665780743403 None
Job timed out after 1 minutes
aes_control_fi 19000048254560057560895256646130342316652683633499772594970898868443678000689 None
Job timed out after 1 minutes
aes_control_fi 68877297788459921340946476874396866937540159234417191743426140235599652428687 None
Job timed out after 1 minutes
aes_cipher_fi 94787815271353702233152367374801134291274730067793130664551502090323382152778 None
Job timed out after 1 minutes
aes_cipher_fi 106817522920457561121411581289980233089346629604869374309411211897580859718511 None
Job timed out after 1 minutes
aes_cipher_fi 69257751724956288398200494690758348304406661315641981205441638032137583902153 None
Job timed out after 1 minutes
aes_cipher_fi 103875727391608070997773803390032863437478781760190384100290988121372713431773 None
Job timed out after 1 minutes
aes_control_fi 5669829037389887038396710899372245826126687337792480994205312001109582093917 None
Job timed out after 1 minutes
aes_control_fi 17876945318936989179490960699220632733517194381838354507678704669621497686397 None
Job timed out after 1 minutes
aes_cipher_fi 62202011940129676750285763113132632853672115582685197632944312627403171475701 None
Job timed out after 1 minutes
aes_control_fi 6215494183354472462515955455650763579191336777397852728209153278030787746333 None
Job timed out after 1 minutes
aes_cipher_fi 7343902589410531998626937909835656557298810848515227150426044739581955410473 None
Job timed out after 1 minutes
aes_cipher_fi 32629651082769124587927436002536729581127191073070346311966697281233325839500 None
Job timed out after 1 minutes
aes_control_fi 13837158727439385943103714323715383561718095853300007875491098618255496241671 None
Job timed out after 1 minutes
aes_cipher_fi 2499262456344071716314994510594332741537712299638136478975689912008994700384 None
Job timed out after 1 minutes
aes_control_fi 113945376841070554974303998002525453933422570971911376009527317596435189520538 None
Job timed out after 1 minutes
aes_control_fi 69647758357763403973834897643128035995262003225278228780040084544711874462324 None
Job timed out after 1 minutes
aes_cipher_fi 2553454784507830880842452346132202762500433610763435013805277410020043936651 None
Job timed out after 1 minutes
aes_control_fi 42416960424616811849058611558731748440931267181784756674251350590583540604869 None
Job timed out after 1 minutes
aes_cipher_fi 5466136747557749965982899667918112782125412090488647521924635209066983180570 None
Job timed out after 1 minutes
aes_control_fi 115547613577409529052667573938400534517081225627698694153341064554379043921391 None
Job timed out after 1 minutes
aes_cipher_fi 107486315677817720485471052983398688159567004047676226996804151025833015043884 None
Job timed out after 1 minutes
aes_cipher_fi 63265126130469183653272969955273177415060558081629897264479071480944085940156 None
Job timed out after 1 minutes
aes_control_fi 72780809109342298795412287540992249424800670976685282257428783678534052782447 None
Job timed out after 1 minutes
aes_cipher_fi 87437714926293565984103207673054551571740397318020754562103130207646127256732 None
Job timed out after 1 minutes
aes_cipher_fi 45020741657751156277026886145117897635804777389947869341211231375060197028514 None
Job timed out after 1 minutes
aes_cipher_fi 47067367703147476335485648632556661540349821604867751852544518331651122169332 None
Job timed out after 1 minutes
aes_control_fi 90434947003969176698075648199085089155913265889683009808691109802976442646437 None
Job timed out after 1 minutes
aes_cipher_fi 88267309003509866358934750768685127602281329254378490679113243327189750747235 None
Job timed out after 1 minutes
aes_cipher_fi 110890222096314981370448336682057234337026182915261869542803014947293615850269 None
Job timed out after 1 minutes
aes_cipher_fi 38769705204812604727794797209962442167055342708933288245781300887215299576140 None
Job timed out after 1 minutes
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 50103602957428938578714920409047769197111052759239006974154650923203688661760 132
UVM_FATAL @ 10012681905 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012681905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 21429658519429210430239568903374953451945782914643852496096836318263546525242 134
UVM_FATAL @ 10002867297 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002867297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2)
aes_cipher_fi 93859701102581305757005632343706498389299409976981915313693077103181486713779 129
UVM_FATAL @ 10007943611 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x8d42c784, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10007943611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)
aes_cipher_fi 20108330579005950631564682317424382918877948021254254286970061488506657809186 133
UVM_FATAL @ 10014008356 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x14738f84, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10014008356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---