| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| pwm_smoke | 5.000s | 984.422us | 10 | 10 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| pwm_csr_hw_reset | 2.000s | 16.955us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| pwm_csr_rw | 2.000s | 16.579us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| pwm_csr_bit_bash | 7.000s | 1045.410us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| pwm_csr_aliasing | 3.000s | 95.295us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| pwm_csr_mem_rw_with_rand_reset | 2.000s | 39.350us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| pwm_csr_rw | 2.000s | 16.579us | 20 | 20 | 100.00 | |
| pwm_csr_aliasing | 3.000s | 95.295us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dutycycle | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| pulse | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| blink | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| heartbeat | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| resolution | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| multi_channel | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| polarity | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| phase | 50 | 50 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| pwm_phase | 58.000s | 10611.717us | 25 | 25 | 100.00 | |
| lowpower | 25 | 25 | 100.00 | |||
| pwm_rand_output | 65.000s | 21003.093us | 25 | 25 | 100.00 | |
| perf | 10 | 10 | 100.00 | |||
| pwm_perf | 51.000s | 95590.965us | 10 | 10 | 100.00 | |
| regwen | 1 | 1 | 100.00 | |||
| pwm_regwen | 228.000s | 11060.692us | 1 | 1 | 100.00 | |
| stress_all | 25 | 25 | 100.00 | |||
| pwm_stress_all | 216.000s | 210292.071us | 25 | 25 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| pwm_alert_test | 2.000s | 15.005us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| pwm_tl_errors | 3.000s | 85.092us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| pwm_tl_errors | 3.000s | 85.092us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| pwm_csr_hw_reset | 2.000s | 16.955us | 5 | 5 | 100.00 | |
| pwm_csr_rw | 2.000s | 16.579us | 20 | 20 | 100.00 | |
| pwm_csr_aliasing | 3.000s | 95.295us | 5 | 5 | 100.00 | |
| pwm_same_csr_outstanding | 2.000s | 177.821us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| pwm_csr_hw_reset | 2.000s | 16.955us | 5 | 5 | 100.00 | |
| pwm_csr_rw | 2.000s | 16.579us | 20 | 20 | 100.00 | |
| pwm_csr_aliasing | 3.000s | 95.295us | 5 | 5 | 100.00 | |
| pwm_same_csr_outstanding | 2.000s | 177.821us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 25 | 25 | 100.00 | |||
| pwm_sec_cm | 2.000s | 388.486us | 5 | 5 | 100.00 | |
| pwm_tl_intg_err | 3.000s | 289.440us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| pwm_tl_intg_err | 3.000s | 289.440us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| heartbeat_wrap | 10 | 10 | 100.00 | |||
| pwm_heartbeat_wrap | 61.000s | 21000.340us | 10 | 10 | 100.00 | |
| Test | seed | line | log context |
|---|