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(kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set!":[{"name":"kmac_key_error","qual_name":"0.kmac_key_error.104406318609927834164513221702702193951313238087511884764780480948630081355895","seed":104406318609927834164513221702702193951313238087511884764780480948630081355895,"line":95,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_key_error/latest/run.log","log_context":["UVM_ERROR @ 1682065763 ps: (kmac_base_vseq.sv:382) [uvm_test_top.env.virtual_sequencer.kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == 1) intr_pins[KmacErr] is not set! \n","UVM_INFO @ 1682065763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12)":[{"name":"kmac_sideload_invalid","qual_name":"1.kmac_sideload_invalid.70975663525317587457474422494847311806700733989920617990418590915844406591185","seed":70975663525317587457474422494847311806700733989920617990418590915844406591185,"line":89,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10108376560 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xfec35000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10108376560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"7.kmac_sideload_invalid.7143108092423865568711314044531876919591394962933795425907714629505525431000","seed":7143108092423865568711314044531876919591394962933795425907714629505525431000,"line":89,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10318410793 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe0867000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10318410793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"35.kmac_sideload_invalid.11091492123940243094096349855565530621641455352062710709455638994083872824829","seed":11091492123940243094096349855565530621641455352062710709455638994083872824829,"line":91,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/35.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10779282351 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x561fa000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10779282351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:847) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"1.kmac_stress_all_with_rand_reset.90508107991062929298195269328761461222831965257166965862336272766322927281504","seed":90508107991062929298195269328761461222831965257166965862336272766322927281504,"line":246,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2131383074 ps: (cip_base_vseq.sv:847) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0]) \n","UVM_INFO @ 2131383074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=18)":[{"name":"kmac_sideload_invalid","qual_name":"2.kmac_sideload_invalid.16169748998560212661673674530731509219596994599290691718190108084827200125888","seed":16169748998560212661673674530731509219596994599290691718190108084827200125888,"line":96,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10143773188 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xee083000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)\n","UVM_INFO @ 10143773188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"41.kmac_sideload_invalid.29671063811265496930082109268751958875530552878863623422993166003051452858374","seed":29671063811265496930082109268751958875530552878863623422993166003051452858374,"line":95,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/41.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10752773422 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x7583b000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)\n","UVM_INFO @ 10752773422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"2.kmac_stress_all_with_rand_reset.37816181180658174024334545607211408986599824128090316140685376552843572310071","seed":37816181180658174024334545607211408986599824128090316140685376552843572310071,"line":349,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 4602601201 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 4602601201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_stress_all_with_rand_reset","qual_name":"3.kmac_stress_all_with_rand_reset.92832807631610541144994627614914426752515428809295490986249345809854388730882","seed":92832807631610541144994627614914426752515428809295490986249345809854388730882,"line":119,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1058350574 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1058350574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_stress_all_with_rand_reset","qual_name":"5.kmac_stress_all_with_rand_reset.103811599578489340637217951465059912315793930288995523301833172668597589743256","seed":103811599578489340637217951465059912315793930288995523301833172668597589743256,"line":123,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 10329528448 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 10329528448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6)":[{"name":"kmac_sideload_invalid","qual_name":"4.kmac_sideload_invalid.70503347608872519768981204258693036770847383308467716408610818190278967220105","seed":70503347608872519768981204258693036770847383308467716408610818190278967220105,"line":82,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/4.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10074593503 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x54665000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)\n","UVM_INFO @ 10074593503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"33.kmac_sideload_invalid.114054662780921194097751601471624412750577858819127605068785259140161253770093","seed":114054662780921194097751601471624412750577858819127605068785259140161253770093,"line":83,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/33.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10032725288 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8d2b5000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)\n","UVM_INFO @ 10032725288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10)":[{"name":"kmac_sideload_invalid","qual_name":"5.kmac_sideload_invalid.3915857359051513072239851507359058946407229954849767168342959239614584936050","seed":3915857359051513072239851507359058946407229954849767168342959239614584936050,"line":86,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10368784293 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x77f8f000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)\n","UVM_INFO @ 10368784293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5)":[{"name":"kmac_sideload_invalid","qual_name":"6.kmac_sideload_invalid.15445918105898541189437222259523978786337163020950295516862464828982380338979","seed":15445918105898541189437222259523978786337163020950295516862464828982380338979,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10049185129 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x28e8f000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10049185129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"18.kmac_sideload_invalid.27929827574217782790029718440668953247139544665539816707236249470140880915279","seed":27929827574217782790029718440668953247139544665539816707236249470140880915279,"line":82,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/18.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10066151670 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3f34b000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10066151670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"26.kmac_sideload_invalid.92549706951870958880966907769652129832985975200012484598620039119181349887112","seed":92549706951870958880966907769652129832985975200012484598620039119181349887112,"line":82,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/26.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10115426120 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4bbb1000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10115426120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"27.kmac_sideload_invalid.39133002491145470033886566696158376059479804818765363895321082527334773138663","seed":39133002491145470033886566696158376059479804818765363895321082527334773138663,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/27.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10048900265 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x71459000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10048900265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2)":[{"name":"kmac_sideload_invalid","qual_name":"8.kmac_sideload_invalid.63261082764812159782088607808572772579799607459861397152860212290565478206482","seed":63261082764812159782088607808572772579799607459861397152860212290565478206482,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10011879344 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd246f000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10011879344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"25.kmac_sideload_invalid.4507072478173001127394887057245370633534423647752206142223231511783063404936","seed":4507072478173001127394887057245370633534423647752206142223231511783063404936,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/25.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10016874956 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb46dd000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10016874956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"39.kmac_sideload_invalid.96475696348264313211493905602829382365694961760573764369950604736079247145307","seed":96475696348264313211493905602829382365694961760573764369950604736079247145307,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/39.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10017905081 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd7e9f000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10017905081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)":[{"name":"kmac_sideload_invalid","qual_name":"22.kmac_sideload_invalid.53329651011884726023213614018651360633134241580707968101384028022456951884769","seed":53329651011884726023213614018651360633134241580707968101384028022456951884769,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/22.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10884523708 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcf0d8000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10884523708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16)":[{"name":"kmac_sideload_invalid","qual_name":"28.kmac_sideload_invalid.239300029563660741028806152298995974879582157874347377489107921026570516019","seed":239300029563660741028806152298995974879582157874347377489107921026570516019,"line":95,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/28.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10120970063 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc7d1e000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)\n","UVM_INFO @ 10120970063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)":[{"name":"kmac_sideload_invalid","qual_name":"32.kmac_sideload_invalid.59761445170852678795960327341626511478721502665065460364741599197576131743975","seed":59761445170852678795960327341626511478721502665065460364741599197576131743975,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/32.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10039176292 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcc3fc000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10039176292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=15)":[{"name":"kmac_sideload_invalid","qual_name":"34.kmac_sideload_invalid.83156467128912660590175258583914983476399948919238717086339068485287477227570","seed":83156467128912660590175258583914983476399948919238717086339068485287477227570,"line":92,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/34.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10347953578 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x13a52000, Comparison=CompareOpEq, exp_data=0x1, call_count=15)\n","UVM_INFO @ 10347953578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=14)":[{"name":"kmac_sideload_invalid","qual_name":"38.kmac_sideload_invalid.15799288599030480768212142607953983714381955333566597239723423768907130332410","seed":15799288599030480768212142607953983714381955333566597239723423768907130332410,"line":90,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10425257734 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe925f000, Comparison=CompareOpEq, exp_data=0x1, call_count=14)\n","UVM_INFO @ 10425257734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue":[{"name":"kmac_error","qual_name":"39.kmac_error.113584754786671068783507581586030201267413462437947651180867718703189552614978","seed":113584754786671068783507581586030201267413462437947651180867718703189552614978,"line":206,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/39.kmac_error/latest/run.log","log_context":["UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)":[{"name":"kmac_sideload_invalid","qual_name":"40.kmac_sideload_invalid.39992313396183076935966726637496510532536464969037284778731844496536977462192","seed":39992313396183076935966726637496510532536464969037284778731844496536977462192,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/40.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10022908627 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3d1000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)\n","UVM_INFO @ 10022908627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9)":[{"name":"kmac_sideload_invalid","qual_name":"46.kmac_sideload_invalid.64569017587982022606158087480564910428775444174603719704583606828290522537804","seed":64569017587982022606158087480564910428775444174603719704583606828290522537804,"line":85,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/46.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10069400993 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe2712000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)\n","UVM_INFO @ 10069400993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17)":[{"name":"kmac_sideload_invalid","qual_name":"48.kmac_sideload_invalid.98356448294686407002809585200920343415837524256763037025226016368993555325221","seed":98356448294686407002809585200920343415837524256763037025226016368993555325221,"line":97,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/48.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10093407439 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x24007000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)\n","UVM_INFO @ 10093407439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1456,"total":1485,"percent":98.04713804713805}