{"block":{"name":"alert_handler","variant":null,"commit":"5ec693e5db09b2eb99805c3547847c68e0be36bf","commit_short":"5ec693e","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5ec693e5db09b2eb99805c3547847c68e0be36bf","revision_info":"GitHub Revision: [`5ec693e`](https://github.com/lowrisc/opentitan/tree/5ec693e5db09b2eb99805c3547847c68e0be36bf)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-05T00:07:51Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_earlgrey/ip_autogen/alert_handler/data/alert_handler_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"csr_hw_reset":{"tests":{"alert_handler_csr_hw_reset":{"max_time":9.75,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"alert_handler_csr_rw":{"max_time":10.5,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"alert_handler_csr_bit_bash":{"max_time":426.91,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"alert_handler_csr_aliasing":{"max_time":180.03,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"alert_handler_csr_mem_rw_with_rand_reset":{"max_time":15.66,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"alert_handler_csr_rw":{"max_time":10.5,"sim_time":0.0,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":180.03,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0}},"passed":130,"total":130,"percent":100.0},"V2":{"testpoints":{"esc_accum":{"tests":{"alert_handler_esc_alert_accum":{"max_time":364.58,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"esc_timeout":{"tests":{"alert_handler_esc_intr_timeout":{"max_time":68.58,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"entropy":{"tests":{"alert_handler_entropy":{"max_time":2607.13,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sig_int_fail":{"tests":{"alert_handler_sig_int_fail":{"max_time":53.92,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"clk_skew":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"random_alerts":{"tests":{"alert_handler_random_alerts":{"max_time":75.19,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"random_classes":{"tests":{"alert_handler_random_classes":{"max_time":59.04,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"ping_timeout":{"tests":{"alert_handler_ping_timeout":{"max_time":461.4,"sim_time":0.0,"passed":24,"total":50,"percent":48.0}},"passed":24,"total":50,"percent":48.0},"lpg":{"tests":{"alert_handler_lpg":{"max_time":2353.41,"sim_time":0.0,"passed":47,"total":50,"percent":94.0},"alert_handler_lpg_stub_clk":{"max_time":2882.41,"sim_time":0.0,"passed":48,"total":50,"percent":96.0}},"passed":95,"total":100,"percent":95.0},"stress_all":{"tests":{"alert_handler_stress_all":{"max_time":3960.92,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"alert_handler_entropy_stress_test":{"tests":{"alert_handler_entropy_stress":{"max_time":42.15,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"alert_handler_alert_accum_saturation":{"tests":{"alert_handler_alert_accum_saturation":{"max_time":4.65,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"intr_test":{"tests":{"alert_handler_intr_test":{"max_time":2.45,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"alert_handler_tl_errors":{"max_time":24.48,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"alert_handler_tl_errors":{"max_time":24.48,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"alert_handler_csr_hw_reset":{"max_time":9.75,"sim_time":0.0,"passed":5,"total":5,"percent":100.0},"alert_handler_csr_rw":{"max_time":10.5,"sim_time":0.0,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":180.03,"sim_time":0.0,"passed":5,"total":5,"percent":100.0},"alert_handler_same_csr_outstanding":{"max_time":39.85,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"alert_handler_csr_hw_reset":{"max_time":9.75,"sim_time":0.0,"passed":5,"total":5,"percent":100.0},"alert_handler_csr_rw":{"max_time":10.5,"sim_time":0.0,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":180.03,"sim_time":0.0,"passed":5,"total":5,"percent":100.0},"alert_handler_same_csr_outstanding":{"max_time":39.85,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":749,"total":780,"percent":96.02564102564102},"V2S":{"testpoints":{"shadow_reg_update_error":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":298.16,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_read_clear_staged_value":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":298.16,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_storage_error":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":298.16,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadowed_reset_glitch":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":298.16,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_update_error_with_csr_rw":{"tests":{"alert_handler_shadow_reg_errors_with_csr_rw":{"max_time":967.3099999999998,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_intg_err":{"tests":{"alert_handler_tl_intg_err":{"max_time":62.209999999999994,"sim_time":0.0,"passed":20,"total":20,"percent":100.0},"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"alert_handler_tl_intg_err":{"max_time":62.209999999999994,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_config_shadow":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":298.16,"sim_time":0.0,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_ping_timer_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_loc_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_class_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":78.3,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_intersig_diff":{"tests":{"alert_handler_sig_int_fail":{"max_time":53.92,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_lpg_intersig_mubi":{"tests":{"alert_handler_lpg":{"max_time":2353.41,"sim_time":0.0,"passed":47,"total":50,"percent":94.0}},"passed":47,"total":50,"percent":94.0},"sec_cm_esc_intersig_diff":{"tests":{"alert_handler_sig_int_fail":{"max_time":53.92,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_rx_intersig_bkgn_chk":{"tests":{"alert_handler_entropy":{"max_time":2607.13,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_esc_tx_intersig_bkgn_chk":{"tests":{"alert_handler_entropy":{"max_time":2607.13,"sim_time":0.0,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_esc_timer_fsm_sparse":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_fsm_sparse":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_fsm_local_esc":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_fsm_local_esc":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_fsm_global_esc":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_accu_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_lfsr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":45.88,"sim_time":0.0,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":657,"total":660,"percent":99.54545454545455},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"alert_handler_stress_all_with_rand_reset":{"max_time":428.43,"sim_time":0.0,"passed":33,"total":50,"percent":66.0}},"passed":33,"total":50,"percent":66.0}},"passed":33,"total":50,"percent":66.0}},"coverage":{"code":{"block":null,"line_statement":99.99,"branch":99.99,"condition_expression":97.51,"toggle":97.09,"fsm":100.0},"assertion":98.88,"functional":99.36},"cov_report_page":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state":[{"name":"alert_handler_ping_timeout","qual_name":"0.alert_handler_ping_timeout.37390657787219179379659751921401879280023514446699956858350302942058455992787","seed":37390657787219179379659751921401879280023514446699956858350302942058455992787,"line":98,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/0.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5771788328 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 5771788328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"3.alert_handler_ping_timeout.50490507683223238493036651539818542884198146301043357335600629624546288138976","seed":50490507683223238493036651539818542884198146301043357335600629624546288138976,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/3.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 2639820422 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 2639820422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"4.alert_handler_ping_timeout.1038665213429981441650558522988755301408361320845668375609186448723621290486","seed":1038665213429981441650558522988755301408361320845668375609186448723621290486,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/4.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 7900114839 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 7900114839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"5.alert_handler_ping_timeout.98608622888363517151068341916808950375109101217513943881023050556635415468856","seed":98608622888363517151068341916808950375109101217513943881023050556635415468856,"line":105,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/5.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5031599407 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 5031599407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"7.alert_handler_ping_timeout.33342589076142324865660607166832045482125612394941384990575346765357700802955","seed":33342589076142324865660607166832045482125612394941384990575346765357700802955,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/7.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1178517844 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 1178517844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"10.alert_handler_ping_timeout.18244435820177413273746377411957772155359153292552231492879043643458948825487","seed":18244435820177413273746377411957772155359153292552231492879043643458948825487,"line":126,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/10.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 28309089528 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 28309089528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"11.alert_handler_ping_timeout.53759904635323805818568545526725730589690572221642926359599685454164220188270","seed":53759904635323805818568545526725730589690572221642926359599685454164220188270,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/11.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 3567543063 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 3567543063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"13.alert_handler_ping_timeout.48974421649947010310007488381999567271913506240123573406227415032173225187263","seed":48974421649947010310007488381999567271913506240123573406227415032173225187263,"line":118,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/13.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5571723643 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 5571723643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"17.alert_handler_ping_timeout.20828577749251640448049346624902188001640077823061538361982839835207247672624","seed":20828577749251640448049346624902188001640077823061538361982839835207247672624,"line":97,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/17.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 10619700370 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 10619700370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_lpg","qual_name":"18.alert_handler_lpg.104740259637006701015298793831898318457104436315776506724045153781675885449231","seed":104740259637006701015298793831898318457104436315776506724045153781675885449231,"line":81,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/18.alert_handler_lpg/latest/run.log","log_context":["UVM_ERROR @ 23097081672 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 23097081672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"19.alert_handler_ping_timeout.89852027548903046744821938607079959837254443641117931082064339706615188231142","seed":89852027548903046744821938607079959837254443641117931082064339706615188231142,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/19.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 2407700198 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 2407700198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"20.alert_handler_ping_timeout.98395313284520473814326730027250342183634362374923405993019333975725955863860","seed":98395313284520473814326730027250342183634362374923405993019333975725955863860,"line":114,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/20.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 21053906982 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 21053906982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"21.alert_handler_ping_timeout.12688738035289276744536128851149026140427788411195465190119281680240603045915","seed":12688738035289276744536128851149026140427788411195465190119281680240603045915,"line":90,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/21.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 2862963927 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 2862963927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"22.alert_handler_ping_timeout.53774474969811257917000350684488202184394993062313178152282954075681135295072","seed":53774474969811257917000350684488202184394993062313178152282954075681135295072,"line":110,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/22.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 6329568331 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 6329568331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"24.alert_handler_ping_timeout.82556447164265458115222739365027821959109511723800299887086239712478380545009","seed":82556447164265458115222739365027821959109511723800299887086239712478380545009,"line":123,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/24.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5378950399 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 5378950399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"25.alert_handler_ping_timeout.115251932547061821406425819132511648273364038733836692759134927122300706311891","seed":115251932547061821406425819132511648273364038733836692759134927122300706311891,"line":102,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/25.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 17060476057 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 17060476057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"27.alert_handler_ping_timeout.13234555820650186151358710423139155424572681210072419023195797950298963761543","seed":13234555820650186151358710423139155424572681210072419023195797950298963761543,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/27.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1792695017 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 1792695017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"28.alert_handler_ping_timeout.44678543956393966567015468208478557220457781210651423490385608147776451557034","seed":44678543956393966567015468208478557220457781210651423490385608147776451557034,"line":93,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/28.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5842245676 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 5842245676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_lpg","qual_name":"28.alert_handler_lpg.83564221302207921934562633478339048974560300657311084553432256827197875448839","seed":83564221302207921934562633478339048974560300657311084553432256827197875448839,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/28.alert_handler_lpg/latest/run.log","log_context":["UVM_ERROR @ 18202730813 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 18202730813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"32.alert_handler_ping_timeout.79483721143372062573290777057314041338594883773102138777896953484184045176453","seed":79483721143372062573290777057314041338594883773102138777896953484184045176453,"line":93,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/32.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 9500259312 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 9500259312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"34.alert_handler_ping_timeout.21966163125808557020314110561892884941307966907556393380826126539695726527073","seed":21966163125808557020314110561892884941307966907556393380826126539695726527073,"line":90,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/34.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 9582472152 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 9582472152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"36.alert_handler_ping_timeout.51064836744347856192362905711601011451124985394437506414139117068296740504252","seed":51064836744347856192362905711601011451124985394437506414139117068296740504252,"line":96,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/36.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 4263541985 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 4263541985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"37.alert_handler_ping_timeout.38536552141227161740618618242349836992509743019918697204070064630556168367665","seed":38536552141227161740618618242349836992509743019918697204070064630556168367665,"line":144,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/37.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 7816492902 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 7816492902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"38.alert_handler_ping_timeout.110541095760818917446199846555585533051569857662918020202771345865374131490192","seed":110541095760818917446199846555585533051569857662918020202771345865374131490192,"line":144,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/38.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 10650204030 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 10650204030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"42.alert_handler_ping_timeout.106926972281646127199168030221352806798578501636373281158039573478713299761803","seed":106926972281646127199168030221352806798578501636373281158039573478713299761803,"line":126,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/42.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 49943321511 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 49943321511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"0.alert_handler_stress_all_with_rand_reset.105673894137933172546076762861768670468357891711782681678941472591072298807116","seed":105673894137933172546076762861768670468357891711782681678941472591072298807116,"line":115,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/0.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 15252812192 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 15252812192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"2.alert_handler_stress_all_with_rand_reset.27333911061470137653669956595884797373040646587011481663058819812740386862075","seed":27333911061470137653669956595884797373040646587011481663058819812740386862075,"line":107,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/2.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 155865120 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 155865120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"8.alert_handler_stress_all_with_rand_reset.609906257474338018707325332498511808742713521897473763091513975559580717992","seed":609906257474338018707325332498511808742713521897473763091513975559580717992,"line":82,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/8.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 534821385 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 534821385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"10.alert_handler_stress_all_with_rand_reset.86451975304400102830746709267063447541447724277311098943066621972003677534644","seed":86451975304400102830746709267063447541447724277311098943066621972003677534644,"line":119,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/10.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 21018181072 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 21018181072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"17.alert_handler_stress_all_with_rand_reset.49449265307307637849476806308638165501146860009518978316261995946714532051507","seed":49449265307307637849476806308638165501146860009518978316261995946714532051507,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/17.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 210826643 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 210826643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"19.alert_handler_stress_all_with_rand_reset.83918675398366828443429574391446609621347233104203187259441696166497560397623","seed":83918675398366828443429574391446609621347233104203187259441696166497560397623,"line":100,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/19.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 152417205 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 152417205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"22.alert_handler_stress_all_with_rand_reset.31890997353151087334813683205574748931605801776064326061217777516851328964611","seed":31890997353151087334813683205574748931605801776064326061217777516851328964611,"line":111,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/22.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 792278536 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 792278536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"23.alert_handler_stress_all_with_rand_reset.104910276037750485319172052408533425602248417037488046521903598610795397296463","seed":104910276037750485319172052408533425602248417037488046521903598610795397296463,"line":93,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/23.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 168008527 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 168008527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"25.alert_handler_stress_all_with_rand_reset.26826501825763849424183416359044158220361142259867217296385371382460263034710","seed":26826501825763849424183416359044158220361142259867217296385371382460263034710,"line":93,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/25.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 811430360 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 811430360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"30.alert_handler_stress_all_with_rand_reset.81807630203096615821844781689229982431908865682030910684465957358296915285436","seed":81807630203096615821844781689229982431908865682030910684465957358296915285436,"line":92,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/30.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 193964770 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10058 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 193964770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"32.alert_handler_stress_all_with_rand_reset.89304524002108830640061758914193148768223819833999197332549735638212724237531","seed":89304524002108830640061758914193148768223819833999197332549735638212724237531,"line":164,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/32.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 11307564332 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 11307564332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"33.alert_handler_stress_all_with_rand_reset.5508193146445616834976674960538748301739668490436911144388713841854401388347","seed":5508193146445616834976674960538748301739668490436911144388713841854401388347,"line":152,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/33.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 11905413493 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 11905413493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"41.alert_handler_stress_all_with_rand_reset.25347374921457519671076471996129524279889113367050843893032535903751435508849","seed":25347374921457519671076471996129524279889113367050843893032535903751435508849,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/41.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 391477204 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 391477204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"42.alert_handler_stress_all_with_rand_reset.77138262461908778748599356479269697842098097347811901133692871399116576833381","seed":77138262461908778748599356479269697842098097347811901133692871399116576833381,"line":141,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/42.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 7894286792 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 7894286792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"44.alert_handler_stress_all_with_rand_reset.84775504802491406040874867127389690401376274183855834841185341189370000977839","seed":84775504802491406040874867127389690401376274183855834841185341189370000977839,"line":178,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/44.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 12118332295 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 12118332295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"48.alert_handler_stress_all_with_rand_reset.93187460849900561278389267826099712753881513132849572843876134650055092513954","seed":93187460849900561278389267826099712753881513132849572843876134650055092513954,"line":94,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/48.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 260808975 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 260808975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:598) [scoreboard] Check failed crashdump_val.loc_alert_cause[i] == `gmv(ral.loc_alert_cause[i]) (* [*] vs * [*])":[{"name":"alert_handler_ping_timeout","qual_name":"2.alert_handler_ping_timeout.34779662294747137706175412887928271677927880607299272758830993157738641709107","seed":34779662294747137706175412887928271677927880607299272758830993157738641709107,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/2.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 496882784 ps: (alert_handler_scoreboard.sv:598) [uvm_test_top.env.scoreboard] Check failed crashdump_val.loc_alert_cause[i] == `gmv(ral.loc_alert_cause[i]) (1 [0x1] vs 0 [0x0]) \n","UVM_INFO @ 496882784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_lpg","qual_name":"2.alert_handler_lpg.5639936219506253215561441376450997074626128596030894835310362394771744701170","seed":5639936219506253215561441376450997074626128596030894835310362394771744701170,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/2.alert_handler_lpg/latest/run.log","log_context":["UVM_ERROR @ 27514812477 ps: (alert_handler_scoreboard.sv:598) [uvm_test_top.env.scoreboard] Check failed crashdump_val.loc_alert_cause[i] == `gmv(ral.loc_alert_cause[i]) (1 [0x1] vs 0 [0x0]) \n","UVM_INFO @ 27514812477 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"26.alert_handler_ping_timeout.32451918115267391826130364940693803317574699763675461652085287370826449320573","seed":32451918115267391826130364940693803317574699763675461652085287370826449320573,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/26.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 3456216906 ps: (alert_handler_scoreboard.sv:598) [uvm_test_top.env.scoreboard] Check failed crashdump_val.loc_alert_cause[i] == `gmv(ral.loc_alert_cause[i]) (1 [0x1] vs 0 [0x0]) \n","UVM_INFO @ 3456216906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"31.alert_handler_ping_timeout.43605520468501769200454558341589928487925678641247353151199767206886169298998","seed":43605520468501769200454558341589928487925678641247353151199767206886169298998,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/31.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 381133427 ps: (alert_handler_scoreboard.sv:598) [uvm_test_top.env.scoreboard] Check failed crashdump_val.loc_alert_cause[i] == `gmv(ral.loc_alert_cause[i]) (1 [0x1] vs 0 [0x0]) \n","UVM_INFO @ 381133427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classa_accum_cnt":[{"name":"alert_handler_lpg_stub_clk","qual_name":"2.alert_handler_lpg_stub_clk.57508273667810353599010721099294397648285521903677423937239445579573512516440","seed":57508273667810353599010721099294397648285521903677423937239445579573512516440,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/2.alert_handler_lpg_stub_clk/latest/run.log","log_context":["UVM_ERROR @ 36635505753 ps: (alert_handler_scoreboard.sv:490) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1145 [0x479] vs 1146 [0x47a]) reg name: alert_handler_reg_block.classa_accum_cnt\n","UVM_INFO @ 36635505753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1149) [alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.":[{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"7.alert_handler_stress_all_with_rand_reset.210924872524464244751012778523719542145974572740874605629776417148783056993","seed":210924872524464244751012778523719542145974572740874605629776417148783056993,"line":126,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/7.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2765374061 ps: (cip_base_vseq.sv:1149) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. \n","UVM_INFO @ 2765374061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalAlertPingFail)":[{"name":"alert_handler_lpg_stub_clk","qual_name":"25.alert_handler_lpg_stub_clk.68626786730858133877835416744496925261152593825634174642463644006788951155116","seed":68626786730858133877835416744496925261152593825634174642463644006788951155116,"line":81,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/25.alert_handler_lpg_stub_clk/latest/run.log","log_context":["UVM_ERROR @ 61025179471 ps: (alert_handler_scoreboard.sv:258) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[1]: saw 0, but expected 1. (is_int_err = 1, local_alert_type = LocalAlertPingFail)\n","UVM_INFO @ 61025179471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1569,"total":1620,"percent":96.85185185185185}