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(cip_base_vseq.sv:847) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"3.kmac_stress_all_with_rand_reset.9046086316507155405275988249654310862872343455746626028749446545332129699589","seed":9046086316507155405275988249654310862872343455746626028749446545332129699589,"line":253,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3100950963 ps: (cip_base_vseq.sv:847) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0]) \n","UVM_INFO @ 3100950963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=27)":[{"name":"kmac_sideload_invalid","qual_name":"5.kmac_sideload_invalid.110305092838066137721330116647135004271018692410392429744964437596009026367792","seed":110305092838066137721330116647135004271018692410392429744964437596009026367792,"line":107,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10572115519 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3d1f4000, Comparison=CompareOpEq, exp_data=0x1, call_count=27)\n","UVM_INFO @ 10572115519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"6.kmac_stress_all_with_rand_reset.29688567662399770221339420294271730074904533574382372406766135320406548098499","seed":29688567662399770221339420294271730074904533574382372406766135320406548098499,"line":225,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3897780051 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 3897780051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_stress_all_with_rand_reset","qual_name":"9.kmac_stress_all_with_rand_reset.25250787994413659896283354056443351026980040196155166655545778468129378871410","seed":25250787994413659896283354056443351026980040196155166655545778468129378871410,"line":245,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 20042693063 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 20042693063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)":[{"name":"kmac_sideload_invalid","qual_name":"7.kmac_sideload_invalid.76631666214451787088349724488113365045860530977307676340838669827968930700226","seed":76631666214451787088349724488113365045860530977307676340838669827968930700226,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10090892094 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x48e44000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10090892094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"14.kmac_sideload_invalid.95413821582208484049554001313558817901631467085892349944838748586087456276582","seed":95413821582208484049554001313558817901631467085892349944838748586087456276582,"line":83,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/14.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10050271690 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x2cacf000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10050271690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"27.kmac_sideload_invalid.40880967860272121307117644052453318788201259463509468455412521253444970613803","seed":40880967860272121307117644052453318788201259463509468455412521253444970613803,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/27.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10037601025 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe67bd000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10037601025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)":[{"name":"kmac_sideload_invalid","qual_name":"9.kmac_sideload_invalid.51634532141338612558913443865429829086101336678839630185726256239896549391708","seed":51634532141338612558913443865429829086101336678839630185726256239896549391708,"line":80,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10140832374 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xaa62c000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)\n","UVM_INFO @ 10140832374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8)":[{"name":"kmac_sideload_invalid","qual_name":"11.kmac_sideload_invalid.89310540921956600121080775510858853304800864216453759564408453420914576646883","seed":89310540921956600121080775510858853304800864216453759564408453420914576646883,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/11.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10040550488 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x21b55000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)\n","UVM_INFO @ 10040550488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"17.kmac_sideload_invalid.87740381287622703551960726002173106158093146771864998877591706994736024145257","seed":87740381287622703551960726002173106158093146771864998877591706994736024145257,"line":85,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/17.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10093065990 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x82c57000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)\n","UVM_INFO @ 10093065990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10)":[{"name":"kmac_sideload_invalid","qual_name":"13.kmac_sideload_invalid.55581366204259158300331120764567442040443880287138670552424774121103226468945","seed":55581366204259158300331120764567442040443880287138670552424774121103226468945,"line":86,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/13.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10065763347 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf903a000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)\n","UVM_INFO @ 10065763347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11)":[{"name":"kmac_sideload_invalid","qual_name":"19.kmac_sideload_invalid.103351876809424665627619419026749884306675857206375839962177191910212181465638","seed":103351876809424665627619419026749884306675857206375839962177191910212181465638,"line":88,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/19.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10180822106 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa1bfa000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)\n","UVM_INFO @ 10180822106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=26)":[{"name":"kmac_sideload_invalid","qual_name":"24.kmac_sideload_invalid.96640571324394288196867178298492480373844245952128206751701939371965300932623","seed":96640571324394288196867178298492480373844245952128206751701939371965300932623,"line":104,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/24.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10156660675 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xfb572000, Comparison=CompareOpEq, exp_data=0x1, call_count=26)\n","UVM_INFO @ 10156660675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5)":[{"name":"kmac_sideload_invalid","qual_name":"38.kmac_sideload_invalid.71350843046601820318078735024152355118389824642923822648539174852157095811223","seed":71350843046601820318078735024152355118389824642923822648539174852157095811223,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10024778565 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x11b79000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10024778565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"42.kmac_sideload_invalid.73312845724879841140207566739690848412919367999905193851523099688490536882767","seed":73312845724879841140207566739690848412919367999905193851523099688490536882767,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/42.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10027619002 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x657d9000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)\n","UVM_INFO @ 10027619002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=22)":[{"name":"kmac_sideload_invalid","qual_name":"44.kmac_sideload_invalid.83876496933253873745887679817305295077541792268077516974590154897027188214203","seed":83876496933253873745887679817305295077541792268077516974590154897027188214203,"line":100,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/44.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10391637671 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3c430000, Comparison=CompareOpEq, exp_data=0x1, call_count=22)\n","UVM_INFO @ 10391637671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)":[{"name":"kmac_sideload_invalid","qual_name":"45.kmac_sideload_invalid.5412585416723756339542749219630688589795049775024500824097223340327370251785","seed":5412585416723756339542749219630688589795049775024500824097223340327370251785,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/45.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10094256649 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa6971000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10094256649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2)":[{"name":"kmac_sideload_invalid","qual_name":"48.kmac_sideload_invalid.19855528436475346320430188638790083805991880167929216156063280901876604593373","seed":19855528436475346320430188638790083805991880167929216156063280901876604593373,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/48.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10015946925 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x54d3d000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10015946925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.prefix_* reset value: *":[{"name":"kmac_shadow_reg_errors_with_csr_rw","qual_name":"0.kmac_shadow_reg_errors_with_csr_rw.52609485812779652268403700627384086165068260690321076128405476408735470370184","seed":52609485812779652268403700627384086165068260690321076128405476408735470370184,"line":181,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_ERROR @  77809098 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (816376795 [0x30a8ebdb] vs 0 [0x0]) Regname: kmac_reg_block.prefix_0 reset value: 0x0 \n","UVM_INFO @  77809098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1466,"total":1485,"percent":98.72053872053873}