{"block":{"name":"alert_handler","variant":null,"commit":"8007f614bd52d7ac557e5e3253489f0bf7b820c5","commit_short":"8007f61","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/8007f614bd52d7ac557e5e3253489f0bf7b820c5","revision_info":"GitHub Revision: [`8007f61`](https://github.com/lowrisc/opentitan/tree/8007f614bd52d7ac557e5e3253489f0bf7b820c5)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-25T09:02:00Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_earlgrey/ip_autogen/alert_handler/data/alert_handler_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"csr_hw_reset":{"tests":{"alert_handler_csr_hw_reset":{"max_time":5.56,"sim_time":353.345283,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"alert_handler_csr_rw":{"max_time":10.55,"sim_time":245.615135,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"alert_handler_csr_bit_bash":{"max_time":372.33,"sim_time":30850.068829,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"alert_handler_csr_aliasing":{"max_time":259.71,"sim_time":10898.925932,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"alert_handler_csr_mem_rw_with_rand_reset":{"max_time":12.56,"sim_time":612.0722430000001,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"alert_handler_csr_rw":{"max_time":10.55,"sim_time":245.615135,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":259.71,"sim_time":10898.925932,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0}},"passed":105,"total":105,"percent":100.0},"V2":{"testpoints":{"esc_accum":{"tests":{"alert_handler_esc_alert_accum":{"max_time":303.09,"sim_time":11755.315911,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"esc_timeout":{"tests":{"alert_handler_esc_intr_timeout":{"max_time":73.95,"sim_time":1216.871736,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"entropy":{"tests":{"alert_handler_entropy":{"max_time":2747.31,"sim_time":198630.311632,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sig_int_fail":{"tests":{"alert_handler_sig_int_fail":{"max_time":56.74,"sim_time":958.39161,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"clk_skew":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"random_alerts":{"tests":{"alert_handler_random_alerts":{"max_time":66.64,"sim_time":4041.030692,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"random_classes":{"tests":{"alert_handler_random_classes":{"max_time":68.43,"sim_time":8035.5424859999985,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"ping_timeout":{"tests":{"alert_handler_ping_timeout":{"max_time":503.24000000000007,"sim_time":54173.600130000006,"passed":18,"total":50,"percent":36.0}},"passed":18,"total":50,"percent":36.0},"lpg":{"tests":{"alert_handler_lpg":{"max_time":2771.18,"sim_time":150825.214053,"passed":49,"total":50,"percent":98.0},"alert_handler_lpg_stub_clk":{"max_time":2777.61,"sim_time":222864.149722,"passed":50,"total":50,"percent":100.0}},"passed":99,"total":100,"percent":99.0},"stress_all":{"tests":{"alert_handler_stress_all":{"max_time":2944.67,"sim_time":610912.6435679999,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"alert_handler_entropy_stress_test":{"tests":{"alert_handler_entropy_stress":{"max_time":72.57,"sim_time":14980.991339,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"alert_handler_alert_accum_saturation":{"tests":{"alert_handler_alert_accum_saturation":{"max_time":4.82,"sim_time":46.526686999999995,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"intr_test":{"tests":{"alert_handler_intr_test":{"max_time":2.25,"sim_time":16.361315,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"alert_handler_tl_errors":{"max_time":20.09,"sim_time":411.39799800000003,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"alert_handler_tl_errors":{"max_time":20.09,"sim_time":411.39799800000003,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"alert_handler_csr_hw_reset":{"max_time":5.56,"sim_time":353.345283,"passed":5,"total":5,"percent":100.0},"alert_handler_csr_rw":{"max_time":10.55,"sim_time":245.615135,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":259.71,"sim_time":10898.925932,"passed":5,"total":5,"percent":100.0},"alert_handler_same_csr_outstanding":{"max_time":38.71,"sim_time":2056.542395,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"alert_handler_csr_hw_reset":{"max_time":5.56,"sim_time":353.345283,"passed":5,"total":5,"percent":100.0},"alert_handler_csr_rw":{"max_time":10.55,"sim_time":245.615135,"passed":20,"total":20,"percent":100.0},"alert_handler_csr_aliasing":{"max_time":259.71,"sim_time":10898.925932,"passed":5,"total":5,"percent":100.0},"alert_handler_same_csr_outstanding":{"max_time":38.71,"sim_time":2056.542395,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":675,"total":710,"percent":95.07042253521126},"V2S":{"testpoints":{"shadow_reg_update_error":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":319.57,"sim_time":12490.017824999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_read_clear_staged_value":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":319.57,"sim_time":12490.017824999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_storage_error":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":319.57,"sim_time":12490.017824999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadowed_reset_glitch":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":319.57,"sim_time":12490.017824999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"shadow_reg_update_error_with_csr_rw":{"tests":{"alert_handler_shadow_reg_errors_with_csr_rw":{"max_time":1169.41,"sim_time":166478.15269299998,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_intg_err":{"tests":{"alert_handler_tl_intg_err":{"max_time":82.45,"sim_time":1208.776263,"passed":20,"total":20,"percent":100.0},"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"alert_handler_tl_intg_err":{"max_time":82.45,"sim_time":1208.776263,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_config_shadow":{"tests":{"alert_handler_shadow_reg_errors":{"max_time":319.57,"sim_time":12490.017824999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_ping_timer_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_loc_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_class_config_regwen":{"tests":{"alert_handler_smoke":{"max_time":52.88,"sim_time":2991.236642,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"sec_cm_alert_intersig_diff":{"tests":{"alert_handler_sig_int_fail":{"max_time":56.74,"sim_time":958.39161,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sec_cm_lpg_intersig_mubi":{"tests":{"alert_handler_lpg":{"max_time":2771.18,"sim_time":150825.214053,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sec_cm_esc_intersig_diff":{"tests":{"alert_handler_sig_int_fail":{"max_time":56.74,"sim_time":958.39161,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sec_cm_alert_rx_intersig_bkgn_chk":{"tests":{"alert_handler_entropy":{"max_time":2747.31,"sim_time":198630.311632,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sec_cm_esc_tx_intersig_bkgn_chk":{"tests":{"alert_handler_entropy":{"max_time":2747.31,"sim_time":198630.311632,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"sec_cm_esc_timer_fsm_sparse":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_fsm_sparse":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_fsm_local_esc":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_fsm_local_esc":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_fsm_global_esc":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_accu_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_esc_timer_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_ctr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ping_timer_lfsr_redun":{"tests":{"alert_handler_sec_cm":{"max_time":74.71,"sim_time":2575.213103,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":262,"total":265,"percent":98.86792452830188},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"alert_handler_stress_all_with_rand_reset":{"max_time":437.95,"sim_time":5836.4009320000005,"passed":30,"total":50,"percent":60.0}},"passed":30,"total":50,"percent":60.0}},"passed":30,"total":50,"percent":60.0}},"coverage":{"code":{"block":null,"line_statement":99.99,"branch":99.99,"condition_expression":97.49,"toggle":97.09,"fsm":100.0},"assertion":98.88,"functional":99.36},"cov_report_page":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state":[{"name":"alert_handler_ping_timeout","qual_name":"0.alert_handler_ping_timeout.50249571365212838756628389826043185114501748753966594652740616101783959046421","seed":50249571365212838756628389826043185114501748753966594652740616101783959046421,"line":115,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/0.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 47324882546 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 47324882546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"2.alert_handler_ping_timeout.86902196803209528168751226902403968661489681006279535805180764363130224690220","seed":86902196803209528168751226902403968661489681006279535805180764363130224690220,"line":105,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/2.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 13712575559 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 13712575559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"3.alert_handler_ping_timeout.105818005485479629492755976693845455552574724989386855742137484607336150205690","seed":105818005485479629492755976693845455552574724989386855742137484607336150205690,"line":96,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/3.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 4753726746 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 4753726746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"5.alert_handler_ping_timeout.108824283006827023191737950375468247037312155956515878788631381557073219851873","seed":108824283006827023191737950375468247037312155956515878788631381557073219851873,"line":136,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/5.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 16249729847 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 16249729847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"12.alert_handler_ping_timeout.100765599371913061565620284790612381731688360860954369420809399381807835666355","seed":100765599371913061565620284790612381731688360860954369420809399381807835666355,"line":90,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/12.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5078077209 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 5078077209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"13.alert_handler_ping_timeout.79384753029151370043346311441599116736649617541078325707398556435137967071237","seed":79384753029151370043346311441599116736649617541078325707398556435137967071237,"line":114,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/13.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 14880570712 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 14880570712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"14.alert_handler_ping_timeout.81586361510198127207555246175432508352687771261930526639324207688504558938550","seed":81586361510198127207555246175432508352687771261930526639324207688504558938550,"line":117,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/14.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 11116218960 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 11116218960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"16.alert_handler_ping_timeout.87232650488750913064701266440329495733261808282998877005785779892956145617914","seed":87232650488750913064701266440329495733261808282998877005785779892956145617914,"line":114,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/16.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 24509157808 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 24509157808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"18.alert_handler_ping_timeout.94592979467076267369491512683298764650786087954594715160457494494420409568594","seed":94592979467076267369491512683298764650786087954594715160457494494420409568594,"line":108,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/18.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 13463262826 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 13463262826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"21.alert_handler_ping_timeout.68677731513395836458116139754662226371707694986948275145701757556303416068496","seed":68677731513395836458116139754662226371707694986948275145701757556303416068496,"line":132,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/21.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 21161951103 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 21161951103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"22.alert_handler_ping_timeout.7231901787872534962117788292056752632338569197665536304249194700835977274824","seed":7231901787872534962117788292056752632338569197665536304249194700835977274824,"line":105,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/22.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 15812655370 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 15812655370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"24.alert_handler_ping_timeout.83309562431869993702100851017092519776536671823325900412453637847030571479869","seed":83309562431869993702100851017092519776536671823325900412453637847030571479869,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/24.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 3224366264 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 3224366264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"26.alert_handler_ping_timeout.3336741491754167902000525755438978963825899518753734705516533598309800273097","seed":3336741491754167902000525755438978963825899518753734705516533598309800273097,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/26.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 941642633 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 941642633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"29.alert_handler_ping_timeout.43793858977784941684322908286368474217835432169991283983085120037857689193647","seed":43793858977784941684322908286368474217835432169991283983085120037857689193647,"line":126,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/29.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 8487953943 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 8487953943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"30.alert_handler_ping_timeout.90916929171788167775305868149242358079095921237324332191871099183850766444409","seed":90916929171788167775305868149242358079095921237324332191871099183850766444409,"line":87,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/30.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1010542789 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 1010542789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"32.alert_handler_ping_timeout.78756066620583730499830258899297500309794564924226440514148332485068895127687","seed":78756066620583730499830258899297500309794564924226440514148332485068895127687,"line":117,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/32.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 5919529119 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 5919529119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"34.alert_handler_ping_timeout.90050814470655169026468703803318978932762008837064040232713555460640081113740","seed":90050814470655169026468703803318978932762008837064040232713555460640081113740,"line":131,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/34.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 30181119077 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 30181119077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"36.alert_handler_ping_timeout.59555653404962390320077867560138406316235893368143562363457209524007579088252","seed":59555653404962390320077867560138406316235893368143562363457209524007579088252,"line":118,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/36.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 13980383726 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 13980383726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"37.alert_handler_ping_timeout.10143925776032429571758754448016513545400300491483997582915432783789497133747","seed":10143925776032429571758754448016513545400300491483997582915432783789497133747,"line":99,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/37.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 20918923501 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 20918923501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"40.alert_handler_ping_timeout.13115804821402686540488523087566344697978062403830331592478833156074473952079","seed":13115804821402686540488523087566344697978062403830331592478833156074473952079,"line":132,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/40.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 9226610301 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 2 [0x2]) reg name: intr_state\n","UVM_INFO @ 9226610301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"42.alert_handler_ping_timeout.39340292115403654714965876773495728259560529385151896431811346929701414581385","seed":39340292115403654714965876773495728259560529385151896431811346929701414581385,"line":108,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/42.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 18977179900 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 1 [0x1]) reg name: intr_state\n","UVM_INFO @ 18977179900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"45.alert_handler_ping_timeout.54294342189502911047211721485033441052360703649193367929885426946586080642576","seed":54294342189502911047211721485033441052360703649193367929885426946586080642576,"line":150,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/45.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 9838639699 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 9838639699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"46.alert_handler_ping_timeout.9421007664159377443387329639754228592770717330915412952471600195764898460880","seed":9421007664159377443387329639754228592770717330915412952471600195764898460880,"line":117,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/46.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 35361373025 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 35361373025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"47.alert_handler_ping_timeout.97207490470637566399996260798804389380101441655219261727449946650301365039212","seed":97207490470637566399996260798804389380101441655219261727449946650301365039212,"line":111,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/47.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 82920042443 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 4 [0x4]) reg name: intr_state\n","UVM_INFO @ 82920042443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"49.alert_handler_ping_timeout.100938833995388992403181802652141488960043720506005423608783545974555227820952","seed":100938833995388992403181802652141488960043720506005423608783545974555227820952,"line":96,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/49.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 3851331949 ps: (alert_handler_scoreboard.sv:486) [uvm_test_top.env.scoreboard] Check failed intr_state_val == item.d_data (0 [0x0] vs 8 [0x8]) reg name: intr_state\n","UVM_INFO @ 3851331949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"1.alert_handler_stress_all_with_rand_reset.99908541484144628138790771881622167043929264952519505010979316562863060590976","seed":99908541484144628138790771881622167043929264952519505010979316562863060590976,"line":102,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/1.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3903798349 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 3903798349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"6.alert_handler_stress_all_with_rand_reset.4924896496422029304437545465196185120733104859995117443115850829195385187358","seed":4924896496422029304437545465196185120733104859995117443115850829195385187358,"line":123,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/6.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 5047749933 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 5047749933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"9.alert_handler_stress_all_with_rand_reset.110874894906164397211874697224621786624418089971667749062944453128966349787985","seed":110874894906164397211874697224621786624418089971667749062944453128966349787985,"line":82,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/9.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 112606578 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 112606578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"10.alert_handler_stress_all_with_rand_reset.60833465098335354378711345408507093008692686021671248381495426608309173573238","seed":60833465098335354378711345408507093008692686021671248381495426608309173573238,"line":110,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/10.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 799605773 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 799605773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"11.alert_handler_stress_all_with_rand_reset.24583894683092511958062989215058737783094004968339822994235058487876544247395","seed":24583894683092511958062989215058737783094004968339822994235058487876544247395,"line":83,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/11.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 453633047 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 453633047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"13.alert_handler_stress_all_with_rand_reset.37164786403625133443736901241591551825476421568571975035047391730015407715886","seed":37164786403625133443736901241591551825476421568571975035047391730015407715886,"line":114,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/13.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 536367597 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 536367597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"18.alert_handler_stress_all_with_rand_reset.97643895578173527271646486460933722909863792814130364864877399725017216664351","seed":97643895578173527271646486460933722909863792814130364864877399725017216664351,"line":110,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/18.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 862230462 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 862230462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"22.alert_handler_stress_all_with_rand_reset.74939336304489809317572494479042745299699707827130138216166253404203493349681","seed":74939336304489809317572494479042745299699707827130138216166253404203493349681,"line":99,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/22.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 13802777224 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 13802777224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"23.alert_handler_stress_all_with_rand_reset.102225544439585565697457839997990190048492546276422445634894160205005205150718","seed":102225544439585565697457839997990190048492546276422445634894160205005205150718,"line":83,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/23.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 156598256 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 156598256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"24.alert_handler_stress_all_with_rand_reset.4298844715871304209003472928197163533520522678711747729190606317030262318024","seed":4298844715871304209003472928197163533520522678711747729190606317030262318024,"line":84,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/24.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 219072978 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 219072978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"26.alert_handler_stress_all_with_rand_reset.114162198910930995487101877335290271876661086939236341401560500275196303998668","seed":114162198910930995487101877335290271876661086939236341401560500275196303998668,"line":192,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/26.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 4948100011 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 4948100011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"29.alert_handler_stress_all_with_rand_reset.108084587705887726617817841414578982188647427235856821013070102339023623731007","seed":108084587705887726617817841414578982188647427235856821013070102339023623731007,"line":157,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/29.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 7966890868 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 7966890868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"31.alert_handler_stress_all_with_rand_reset.87071894064839621348703978929612621842587485256653991072864291881453136162422","seed":87071894064839621348703978929612621842587485256653991072864291881453136162422,"line":157,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/31.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 9364632721 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 9364632721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"32.alert_handler_stress_all_with_rand_reset.69335789292625047839054774711454966011415982803559297528892255444003222583460","seed":69335789292625047839054774711454966011415982803559297528892255444003222583460,"line":117,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/32.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2276491493 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2276491493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"39.alert_handler_stress_all_with_rand_reset.38610699024107814062363190087405719341910970866355866452734951008458092234796","seed":38610699024107814062363190087405719341910970866355866452734951008458092234796,"line":120,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/39.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1725579543 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1725579543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"42.alert_handler_stress_all_with_rand_reset.95548468333856481610548476164698805395053118144901557627211136316931962445399","seed":95548468333856481610548476164698805395053118144901557627211136316931962445399,"line":92,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/42.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 204852305 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 204852305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"43.alert_handler_stress_all_with_rand_reset.113501120501130202126174251299400691587149071313809663677582029834898050032946","seed":113501120501130202126174251299400691587149071313809663677582029834898050032946,"line":186,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/43.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 6051655563 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 6051655563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"45.alert_handler_stress_all_with_rand_reset.54799476270634062776072213075987137331866305966294390203863042032821803305481","seed":54799476270634062776072213075987137331866305966294390203863042032821803305481,"line":209,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/45.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 10336477678 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 10336477678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"49.alert_handler_stress_all_with_rand_reset.33073877300207861202422683972834286958830835377095614101645416935788429020490","seed":33073877300207861202422683972834286958830835377095614101645416935788429020490,"line":90,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/49.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2781794942 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2781794942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model.":[{"name":"alert_handler_ping_timeout","qual_name":"6.alert_handler_ping_timeout.37559884228401961562131849025465885106207605498144502099803104371061255876641","seed":37559884228401961562131849025465885106207605498144502099803104371061255876641,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/6.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 927821717 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 927821717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"10.alert_handler_ping_timeout.50455813083694676584256517700436369016612334758196463149014151497794911165211","seed":50455813083694676584256517700436369016612334758196463149014151497794911165211,"line":81,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/10.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 661888556 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 661888556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"11.alert_handler_ping_timeout.78391622463502052824698095358184670371631546964497401356019190920750241649217","seed":78391622463502052824698095358184670371631546964497401356019190920750241649217,"line":81,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/11.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1973601150 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 1973601150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"38.alert_handler_ping_timeout.16255020187298138784814889245512331779876495793710912489735756859826008709159","seed":16255020187298138784814889245512331779876495793710912489735756859826008709159,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/38.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 364132100 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 364132100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"39.alert_handler_ping_timeout.39808592734794278702901109315068933054651596034627581456870129244264883922103","seed":39808592734794278702901109315068933054651596034627581456870129244264883922103,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/39.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1690377259 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 1690377259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"43.alert_handler_ping_timeout.84893016343121632005536991884028263654400445226917149880700390560473479502547","seed":84893016343121632005536991884028263654400445226917149880700390560473479502547,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/43.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 1262996986 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 1262996986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"alert_handler_ping_timeout","qual_name":"44.alert_handler_ping_timeout.33504753788289796716978262628590161110098503431152067495340125947379489707079","seed":33504753788289796716978262628590161110098503431152067495340125947379489707079,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/44.alert_handler_ping_timeout/latest/run.log","log_context":["UVM_ERROR @ 534158414 ps: (alert_handler_scoreboard.sv:608) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Register/crashdump mismatch. loc_alert_cause[0] is 0x1 in the crashdump and 0x0 in the register model.\n","UVM_INFO @ 534158414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classd_state":[{"name":"alert_handler_sig_int_fail","qual_name":"17.alert_handler_sig_int_fail.100167417174324351544310154386814269755563231227720450403774947205844672686219","seed":100167417174324351544310154386814269755563231227720450403774947205844672686219,"line":81,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/17.alert_handler_sig_int_fail/latest/run.log","log_context":["UVM_ERROR @  78337808 ps: (alert_handler_scoreboard.sv:490) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3 [0x3]) reg name: alert_handler_reg_block.classd_state\n","UVM_INFO @  78337808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classd_accum_cnt":[{"name":"alert_handler_entropy","qual_name":"22.alert_handler_entropy.22348538267844976392913608330070772280223156707807756219094885847814632725921","seed":22348538267844976392913608330070772280223156707807756219094885847814632725921,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/22.alert_handler_entropy/latest/run.log","log_context":["UVM_ERROR @ 16904628722 ps: (alert_handler_scoreboard.sv:490) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (335 [0x14f] vs 336 [0x150]) reg name: alert_handler_reg_block.classd_accum_cnt\n","UVM_INFO @ 16904628722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.loc_alert_cause_*":[{"name":"alert_handler_lpg","qual_name":"36.alert_handler_lpg.108560148597585294170879992823507817742232859674745155393858834429487517941675","seed":108560148597585294170879992823507817742232859674745155393858834429487517941675,"line":80,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/36.alert_handler_lpg/latest/run.log","log_context":["UVM_ERROR @ 7390087295 ps: (alert_handler_scoreboard.sv:490) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: alert_handler_reg_block.loc_alert_cause_0\n","UVM_INFO @ 7390087295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1149) [alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.":[{"name":"alert_handler_stress_all_with_rand_reset","qual_name":"47.alert_handler_stress_all_with_rand_reset.25125576149550538858081997957003143669354618037240247901739179690272183759422","seed":25125576149550538858081997957003143669354618037240247901739179690272183759422,"line":145,"log_path":"/nightly/current_run/scratch/master/alert_handler-sim-vcs/47.alert_handler_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3305392408 ps: (cip_base_vseq.sv:1149) [uvm_test_top.env.virtual_sequencer.alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. \n","UVM_INFO @ 3305392408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":795,"total":850,"percent":93.52941176470588}