{"block":{"name":"clkmgr","variant":null,"commit":"8007f614bd52d7ac557e5e3253489f0bf7b820c5","commit_short":"8007f61","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/8007f614bd52d7ac557e5e3253489f0bf7b820c5","revision_info":"GitHub Revision: [`8007f61`](https://github.com/lowrisc/opentitan/tree/8007f614bd52d7ac557e5e3253489f0bf7b820c5)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-25T09:02:00Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_earlgrey/ip_autogen/clkmgr/data/clkmgr_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"clkmgr_smoke":{"max_time":1.6,"sim_time":262.61784,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"csr_hw_reset":{"tests":{"clkmgr_csr_hw_reset":{"max_time":1.14,"sim_time":67.779837,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":142.06964799999997,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"clkmgr_csr_bit_bash":{"max_time":10.13,"sim_time":2985.3987340000003,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"clkmgr_csr_aliasing":{"max_time":1.79,"sim_time":87.341418,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"clkmgr_csr_mem_rw_with_rand_reset":{"max_time":1.95,"sim_time":117.787004,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":142.06964799999997,"passed":20,"total":20,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":1.79,"sim_time":87.341418,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0}},"passed":105,"total":105,"percent":100.0},"V2":{"testpoints":{"peri_enables":{"tests":{"clkmgr_peri":{"max_time":1.3,"sim_time":86.83557300000001,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"trans_enables":{"tests":{"clkmgr_trans":{"max_time":1.89,"sim_time":519.755267,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"extclk":{"tests":{"clkmgr_extclk":{"max_time":2.28,"sim_time":257.937329,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"clk_status":{"tests":{"clkmgr_clk_status":{"max_time":1.25,"sim_time":44.751691,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"jitter":{"tests":{"clkmgr_smoke":{"max_time":1.6,"sim_time":262.61784,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"frequency":{"tests":{"clkmgr_frequency":{"max_time":12.71,"sim_time":2361.3957370000003,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"frequency_timeout":{"tests":{"clkmgr_frequency_timeout":{"max_time":14.17,"sim_time":2419.3588870000003,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"frequency_overflow":{"tests":{"clkmgr_frequency":{"max_time":12.71,"sim_time":2361.3957370000003,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"stress_all":{"tests":{"clkmgr_stress_all":{"max_time":53.01,"sim_time":11356.270736999999,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"alert_test":{"tests":{"clkmgr_alert_test":{"max_time":1.65,"sim_time":204.943389,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"clkmgr_tl_errors":{"max_time":3.35,"sim_time":574.51622,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"clkmgr_tl_errors":{"max_time":3.35,"sim_time":574.51622,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":1.14,"sim_time":67.779837,"passed":5,"total":5,"percent":100.0},"clkmgr_csr_rw":{"max_time":1.15,"sim_time":142.06964799999997,"passed":20,"total":20,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":1.79,"sim_time":87.341418,"passed":5,"total":5,"percent":100.0},"clkmgr_same_csr_outstanding":{"max_time":1.68,"sim_time":159.145926,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":1.14,"sim_time":67.779837,"passed":5,"total":5,"percent":100.0},"clkmgr_csr_rw":{"max_time":1.15,"sim_time":142.06964799999997,"passed":20,"total":20,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":1.79,"sim_time":87.341418,"passed":5,"total":5,"percent":100.0},"clkmgr_same_csr_outstanding":{"max_time":1.68,"sim_time":159.145926,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":520,"total":520,"percent":100.0},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"clkmgr_sec_cm":{"max_time":2.64,"sim_time":317.190094,"passed":2,"total":5,"percent":40.0},"clkmgr_tl_intg_err":{"max_time":3.13,"sim_time":231.55759099999997,"passed":20,"total":20,"percent":100.0}},"passed":22,"total":25,"percent":88.0},"shadow_r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(clkmgr_extclk_vseq.sv:99) [clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (* [*] vs * [*]) extclk_status mismatch":[{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"0.clkmgr_clk_handshake_intersig_mubi.93445195067284022651770883168901676198722874105483031797576940061582716610329","seed":93445195067284022651770883168901676198722874105483031797576940061582716610329,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @   5744801 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (14 [0xe] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @   5744801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"10.clkmgr_clk_handshake_intersig_mubi.42128176626421993485192505448759525130566261037243536319058882301012693384418","seed":42128176626421993485192505448759525130566261037243536319058882301012693384418,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/10.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @  39759420 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (8 [0x8] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @  39759420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"11.clkmgr_clk_handshake_intersig_mubi.6905085858748246567021334474021980060079363659462626038888525913543692733005","seed":6905085858748246567021334474021980060079363659462626038888525913543692733005,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/11.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @  43731479 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (7 [0x7] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @  43731479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"36.clkmgr_clk_handshake_intersig_mubi.34407858475077915736518435367768421547110899035678935093160310049905568834846","seed":34407858475077915736518435367768421547110899035678935093160310049905568834846,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/36.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @  19572395 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (1 [0x1] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @  19572395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [clkmgr_common_vseq] expect alert:fatal_fault to fire":[{"name":"clkmgr_sec_cm","qual_name":"2.clkmgr_sec_cm.89802439245532498538397331966854892155573452448868286318910499051016576360749","seed":89802439245532498538397331966854892155573452448868286318910499051016576360749,"line":82,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/2.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @   7388917 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @   7388917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_sec_cm","qual_name":"3.clkmgr_sec_cm.60088661530584109654570772246438996509566988380204673551896822052814060048967","seed":60088661530584109654570772246438996509566988380204673551896822052814060048967,"line":97,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/3.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @  55810742 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @  55810742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_sec_cm","qual_name":"4.clkmgr_sec_cm.12121070269295498176487760021143572609291422817420578099804877679972915535067","seed":12121070269295498176487760021143572609291422817420578099804877679972915535067,"line":87,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/4.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @  12869839 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @  12869839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '(step_down || maybe_divided_clk)'":[{"name":"clkmgr_lc_ctrl_intersig_mubi","qual_name":"3.clkmgr_lc_ctrl_intersig_mubi.92909743746446627825068400089665339070031931225405713793192452870753744267766","seed":92909743746446627825068400089665339070031931225405713793192452870753744267766,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/3.clkmgr_lc_ctrl_intersig_mubi/latest/run.log","log_context":["\tOffending '(step_down || maybe_divided_clk)'\n","UVM_ERROR @  10254485 ps: (clkmgr_div_sva_if.sv:63) [ASSERT FAILED] Div4Whole_A\n","UVM_INFO @  10254485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR (clkmgr_common_vseq.sv:50) [clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger!":[{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"3.clkmgr_shadow_reg_errors_with_csr_rw.9996412368172138800306288553105923474863833397519932292349342765903319136386","seed":9996412368172138800306288553105923474863833397519932292349342765903319136386,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/3.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_ERROR @   3546047 ps: (clkmgr_common_vseq.sv:50) [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault does not trigger!\n","UVM_INFO @   3546047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"17.clkmgr_shadow_reg_errors_with_csr_rw.20674269883077639897396199470041687572865786972810853458595222606716853513800","seed":20674269883077639897396199470041687572865786972810853458595222606716853513800,"line":76,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/17.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_ERROR @  69435605 ps: (clkmgr_common_vseq.sv:50) [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault does not trigger!\n","UVM_INFO @  69435605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.fatal_err_code.shadow_storage_err reset value: * Check_csr_read_clear_staged_val task: check storage_err status":[{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"19.clkmgr_shadow_reg_errors_with_csr_rw.12937399713611465946936546038355650432605493328442164632048262874118617454623","seed":12937399713611465946936546038355650432605493328442164632048262874118617454623,"line":76,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/19.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_ERROR @ 126033692 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.fatal_err_code.shadow_storage_err reset value: 0x0  Check_csr_read_clear_staged_val task: check storage_err status\n","UVM_INFO @ 126033692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":949,"total":960,"percent":98.85416666666667}