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---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"24.kmac_sideload_invalid.114242891659394914363711765076384197710293432549080890439892804528851195422145","seed":114242891659394914363711765076384197710293432549080890439892804528851195422145,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/24.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10150837775 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x812c4000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10150837775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"28.kmac_sideload_invalid.54289289035411607764508053405082300480174598368635775720379796429239409804771","seed":54289289035411607764508053405082300480174598368635775720379796429239409804771,"line":85,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/28.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10157990884 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x222be000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10157990884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2)":[{"name":"kmac_sideload_invalid","qual_name":"2.kmac_sideload_invalid.35936300754597150484173946614344149908517726555075391862849588489548712839280","seed":35936300754597150484173946614344149908517726555075391862849588489548712839280,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10036030091 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x12a82000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10036030091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"27.kmac_sideload_invalid.98505291407665226409006400316811236225038755679803189254189012342086049297801","seed":98505291407665226409006400316811236225038755679803189254189012342086049297801,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/27.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10091636076 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe1cd2000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10091636076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"40.kmac_sideload_invalid.7459382606223909810874654209232492520269837165392676034648792899139451985966","seed":7459382606223909810874654209232492520269837165392676034648792899139451985966,"line":78,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/40.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10177239276 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xab7c9000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)\n","UVM_INFO @ 10177239276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:847) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"2.kmac_stress_all_with_rand_reset.41719073535143103353405314970575991693212605107777871739108082641507336138573","seed":41719073535143103353405314970575991693212605107777871739108082641507336138573,"line":370,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 15403276987 ps: (cip_base_vseq.sv:847) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0]) \n","UVM_INFO @ 15403276987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8)":[{"name":"kmac_sideload_invalid","qual_name":"6.kmac_sideload_invalid.475327267102910534693644635893283968049929436920512214606095209854161304183","seed":475327267102910534693644635893283968049929436920512214606095209854161304183,"line":85,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10058214095 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x86223000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)\n","UVM_INFO @ 10058214095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"7.kmac_sideload_invalid.2929877357131983109680118379444551108038120666025344344711045491195156242103","seed":2929877357131983109680118379444551108038120666025344344711045491195156242103,"line":84,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10062253370 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6f4c4000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)\n","UVM_INFO @ 10062253370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"6.kmac_stress_all_with_rand_reset.63142212019742284352817742633021127334244315053251874277077137438151404856110","seed":63142212019742284352817742633021127334244315053251874277077137438151404856110,"line":100,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1911736187 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1911736187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11)":[{"name":"kmac_sideload_invalid","qual_name":"12.kmac_sideload_invalid.73479464775702915266478763579440377904678921300088649188168646314029608349681","seed":73479464775702915266478763579440377904678921300088649188168646314029608349681,"line":89,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/12.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10200646323 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x84343000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)\n","UVM_INFO @ 10200646323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"13.kmac_sideload_invalid.101355055823610565233112570556458262259542432342907478370765625110795471997403","seed":101355055823610565233112570556458262259542432342907478370765625110795471997403,"line":87,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/13.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10227523143 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa69b0000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)\n","UVM_INFO @ 10227523143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)":[{"name":"kmac_sideload_invalid","qual_name":"17.kmac_sideload_invalid.90757797874649853828939119881365709331048090018043724749313714950470472656846","seed":90757797874649853828939119881365709331048090018043724749313714950470472656846,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/17.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10022824138 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb75fd000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10022824138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"39.kmac_sideload_invalid.20244828509000482745023537167645494996034538537529751179237749424538449439115","seed":20244828509000482745023537167645494996034538537529751179237749424538449439115,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/39.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10041963463 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x74560000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10041963463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"41.kmac_sideload_invalid.69816412396280973130566231447309465391162244931867539208743334848866201809631","seed":69816412396280973130566231447309465391162244931867539208743334848866201809631,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/41.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10016763668 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x97cde000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10016763668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"49.kmac_sideload_invalid.85517140773746559156175687276532461085783395450460613261291807221925989371636","seed":85517140773746559156175687276532461085783395450460613261291807221925989371636,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10167094301 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb74ef000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10167094301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set!":[{"name":"kmac_key_error","qual_name":"17.kmac_key_error.113602475010711449697854248766740276275947932843719042853025769621539535865934","seed":113602475010711449697854248766740276275947932843719042853025769621539535865934,"line":89,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/17.kmac_key_error/latest/run.log","log_context":["UVM_ERROR @ 513065320 ps: (kmac_base_vseq.sv:382) [uvm_test_top.env.virtual_sequencer.kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == 1) intr_pins[KmacErr] is not set! \n","UVM_INFO @ 513065320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12)":[{"name":"kmac_sideload_invalid","qual_name":"29.kmac_sideload_invalid.88614227866808132050194567380539423732592634065135617018818158030759516019482","seed":88614227866808132050194567380539423732592634065135617018818158030759516019482,"line":90,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/29.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10436173892 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x9b8a9000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10436173892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)":[{"name":"kmac_sideload_invalid","qual_name":"45.kmac_sideload_invalid.78787119840654653557781601059861870187787056629475311292471624188695055516782","seed":78787119840654653557781601059861870187787056629475311292471624188695055516782,"line":81,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/45.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10094165101 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd9235000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)\n","UVM_INFO @ 10094165101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":921,"total":940,"percent":97.97872340425532}