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(cip_base_vseq.sv:1022) virtual_sequencer [clkmgr_common_vseq] expect alert:fatal_fault to fire":[{"name":"clkmgr_sec_cm","qual_name":"0.clkmgr_sec_cm.92791053688555321856131430134581436928640960446987116161225301259467059999681","seed":92791053688555321856131430134581436928640960446987116161225301259467059999681,"line":147,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @ 259770211 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @ 259770211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_sec_cm","qual_name":"1.clkmgr_sec_cm.5632372223424707955286522111855967394518823517362447292769025668964371343584","seed":5632372223424707955286522111855967394518823517362447292769025668964371343584,"line":100,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/1.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @  76011703 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @  76011703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_sec_cm","qual_name":"2.clkmgr_sec_cm.46776485868404342963051307738257688775228793681996963875466620512497708912669","seed":46776485868404342963051307738257688775228793681996963875466620512497708912669,"line":100,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/2.clkmgr_sec_cm/latest/run.log","log_context":["UVM_ERROR @  90865242 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] expect alert:fatal_fault to fire\n","UVM_INFO @  90865242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_extclk_vseq.sv:99) [clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (* [*] vs * [*]) extclk_status mismatch":[{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"19.clkmgr_clk_handshake_intersig_mubi.68934913191648991576913240925458794098354440391776741842853969773296113352776","seed":68934913191648991576913240925458794098354440391776741842853969773296113352776,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/19.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @   6665145 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (11 [0xb] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @   6665145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"26.clkmgr_clk_handshake_intersig_mubi.32791115123200503586088550196986835733534838506084099338897878628918782763231","seed":32791115123200503586088550196986835733534838506084099338897878628918782763231,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/26.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @  23644519 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (14 [0xe] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @  23644519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_clk_handshake_intersig_mubi","qual_name":"47.clkmgr_clk_handshake_intersig_mubi.82658814288977111213748007111764311794814345597206473960149345448417407780371","seed":82658814288977111213748007111764311794814345597206473960149345448417407780371,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/47.clkmgr_clk_handshake_intersig_mubi/latest/run.log","log_context":["UVM_ERROR @   3514829 ps: (clkmgr_extclk_vseq.sv:99) [uvm_test_top.env.virtual_sequencer.clkmgr_extclk_vseq] Check failed exp_all_clk_byp_ack == rd_data (14 [0xe] vs 9 [0x9]) extclk_status mismatch\n","UVM_INFO @   3514829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_common_vseq.sv:50) [clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger!":[{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"2.clkmgr_shadow_reg_errors_with_csr_rw.36261272135400254112692992441074353989176369089000948304512544035431422678823","seed":36261272135400254112692992441074353989176369089000948304512544035431422678823,"line":76,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/2.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_ERROR @ 609490493 ps: (clkmgr_common_vseq.sv:50) [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault does not trigger!\n","UVM_INFO @ 609490493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":953,"total":960,"percent":99.27083333333333}