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---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"37.lc_ctrl_stress_all_with_rand_reset.88542715458784296792130971244285413016258740128734530226747639181933016806593","seed":88542715458784296792130971244285413016258740128734530226747639181933016806593,"line":1456,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/37.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 944939705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"38.lc_ctrl_stress_all_with_rand_reset.65813898942024739302957387356032446110152495525903405042628190110575531906837","seed":65813898942024739302957387356032446110152495525903405042628190110575531906837,"line":3731,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/38.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 2515988854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"40.lc_ctrl_stress_all_with_rand_reset.51497968236627598184277448466410804585620633540225110227211686111178719492206","seed":51497968236627598184277448466410804585620633540225110227211686111178719492206,"line":1059,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/40.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 4502555809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"41.lc_ctrl_stress_all_with_rand_reset.58395087493952020870023515641800712651889891607132348444830169923662009568218","seed":58395087493952020870023515641800712651889891607132348444830169923662009568218,"line":1531,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/41.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1560819365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"44.lc_ctrl_stress_all_with_rand_reset.69928343374872448517039690904546358695074648510375776646871912649052433149185","seed":69928343374872448517039690904546358695074648510375776646871912649052433149185,"line":3598,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/44.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1313626634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"47.lc_ctrl_stress_all_with_rand_reset.30073943824942555810212398984511935038722891721743189281542316110301733272703","seed":30073943824942555810212398984511935038722891721743189281542316110301733272703,"line":1755,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/47.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 2984861924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"48.lc_ctrl_stress_all_with_rand_reset.26663903840801054778811819754971804162471955941456432554708085663876245854225","seed":26663903840801054778811819754971804162471955941456432554708085663876245854225,"line":609,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/48.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 2062493945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"49.lc_ctrl_stress_all_with_rand_reset.25714010369754271857328872687747382931719630961868927209652672939700623877402","seed":25714010369754271857328872687747382931719630961868927209652672939700623877402,"line":201,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/49.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 456442104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (alert_receiver_driver.sv:265) driver [driver] m_transaction_tasks nonempty after reset: '{*:*}":[{"name":"lc_ctrl_errors","qual_name":"3.lc_ctrl_errors.17929951165335026405416220133348135893342090319506496633600403576003124605864","seed":17929951165335026405416220133348135893342090319506496633600403576003124605864,"line":548,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/3.lc_ctrl_errors/latest/run.log","log_context":["UVM_INFO @  30050074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (lc_ctrl_errors_vseq.sv:768) [lc_ctrl_lc_errors_vseq] Check failed nvm_rma_error_act == nvm_rma_error_exp (* [*] vs * [*])":[{"name":"lc_ctrl_stress_all","qual_name":"6.lc_ctrl_stress_all.106045602801021985849839631917299525005421610279341791645743603975232028519202","seed":106045602801021985849839631917299525005421610279341791645743603975232028519202,"line":5842,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/6.lc_ctrl_stress_all/latest/run.log","log_context":["UVM_INFO @ 1213085313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"8.lc_ctrl_stress_all_with_rand_reset.871869086738457402747146263067035374095110932816288569831758118719267070780","seed":871869086738457402747146263067035374095110932816288569831758118719267070780,"line":2084,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/8.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 12911636738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_stress_all","qual_name":"18.lc_ctrl_stress_all.54510757446115915632730062626753417922851731261906687457571340768674830556967","seed":54510757446115915632730062626753417922851731261906687457571340768674830556967,"line":5154,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/18.lc_ctrl_stress_all/latest/run.log","log_context":["UVM_INFO @ 4240119223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_errors","qual_name":"36.lc_ctrl_errors.23202546330058711710214813721659548594227719872660101402481878528805296623658","seed":23202546330058711710214813721659548594227719872660101402481878528805296623658,"line":671,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/36.lc_ctrl_errors/latest/run.log","log_context":["UVM_INFO @ 169888684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"lc_ctrl_errors","qual_name":"46.lc_ctrl_errors.111856082124369236762322874914298688289083295381666316970989213465676978648070","seed":111856082124369236762322874914298688289083295381666316970989213465676978648070,"line":1256,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/46.lc_ctrl_errors/latest/run.log","log_context":["UVM_INFO @ 105551777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:912) virtual_sequencer [lc_ctrl_common_vseq] Alert fatal_state_error fired unexpectedly.":[{"name":"lc_ctrl_stress_all_with_rand_reset","qual_name":"13.lc_ctrl_stress_all_with_rand_reset.104007177341315891595121140766624902988868764657631539995480272196137192301460","seed":104007177341315891595121140766624902988868764657631539995480272196137192301460,"line":8669,"log_path":"/nightly/current_run/scratch/master/lc_ctrl_volatile_unlock_disabled-sim-vcs/13.lc_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 10976975747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1001,"total":1030,"percent":97.18446601941747}