{"block":{"name":"sram_ctrl","variant":"ret","commit":"9424e6379a611bdf92b9804564f5ef56f13fa98c","commit_short":"9424e63","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/9424e6379a611bdf92b9804564f5ef56f13fa98c","revision_info":"GitHub Revision: [`9424e63`](https://github.com/lowrisc/opentitan/tree/9424e6379a611bdf92b9804564f5ef56f13fa98c)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-06-13T02:15:06Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/sram_ctrl_ret/data/sram_ctrl_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":111.98236999999999,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"csr_hw_reset":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":33.732118,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":18.225068999999998,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_bit_bash":{"tests":{"sram_ctrl_csr_bit_bash":{"max_time":2.0,"sim_time":766.7103020000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":25.232996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"sram_ctrl_csr_mem_rw_with_rand_reset":{"max_time":3.0,"sim_time":49.397104,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":18.225068999999998,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":25.232996,"passed":1,"total":1,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"mem_walk":{"tests":{"sram_ctrl_mem_walk":{"max_time":15.0,"sim_time":3395.956949,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"mem_partial_access":{"tests":{"sram_ctrl_mem_partial_access":{"max_time":6.0,"sim_time":361.306558,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0}},"passed":37,"total":37,"percent":100.0},"V2":{"testpoints":{"multiple_keys":{"tests":{"sram_ctrl_multiple_keys":{"max_time":17.0,"sim_time":4171.650518,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"stress_pipeline":{"tests":{"sram_ctrl_stress_pipeline":{"max_time":210.0,"sim_time":15946.847196,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"bijection":{"tests":{"sram_ctrl_bijection":{"max_time":11.0,"sim_time":6905.187864,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"access_during_key_req":{"tests":{"sram_ctrl_access_during_key_req":{"max_time":20.0,"sim_time":1072.3411059999999,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"lc_escalation":{"tests":{"sram_ctrl_lc_escalation":{"max_time":9.0,"sim_time":2324.387291,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"executable":{"tests":{"sram_ctrl_executable":{"max_time":14.0,"sim_time":1396.677978,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"partial_access":{"tests":{"sram_ctrl_partial_access":{"max_time":2.0,"sim_time":57.254569000000004,"passed":8,"total":8,"percent":100.0},"sram_ctrl_partial_access_b2b":{"max_time":361.0,"sim_time":46082.420226999995,"passed":8,"total":8,"percent":100.0}},"passed":16,"total":16,"percent":100.0},"max_throughput":{"tests":{"sram_ctrl_max_throughput":{"max_time":2.0,"sim_time":102.949749,"passed":0,"total":8,"percent":0.0},"sram_ctrl_throughput_w_partial_write":{"max_time":2.0,"sim_time":100.52658100000001,"passed":0,"total":8,"percent":0.0},"sram_ctrl_throughput_w_readback":{"max_time":2.0,"sim_time":117.763895,"passed":0,"total":8,"percent":0.0}},"passed":0,"total":24,"percent":0.0},"regwen":{"tests":{"sram_ctrl_regwen":{"max_time":15.0,"sim_time":14244.584182,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"ram_cfg":{"tests":{"sram_ctrl_ram_cfg":{"max_time":2.0,"sim_time":81.822549,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"stress_all":{"tests":{"sram_ctrl_stress_all":{"max_time":74.0,"sim_time":49549.198681,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"alert_test":{"tests":{"sram_ctrl_alert_test":{"max_time":2.0,"sim_time":34.830447,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":6.0,"sim_time":449.206795,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_illegal_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":6.0,"sim_time":449.206795,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_outstanding_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":33.732118,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":18.225068999999998,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":25.232996,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":20.291518,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0},"tl_d_partial_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":33.732118,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":18.225068999999998,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":25.232996,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":20.291518,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0}},"passed":135,"total":159,"percent":84.90566037735849},"V2S":{"testpoints":{"passthru_mem_tl_intg_err":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":4.0,"sim_time":788.5627290000001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"tl_intg_err":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0},"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":2103.77405,"passed":25,"total":25,"percent":100.0}},"passed":30,"total":30,"percent":100.0},"prim_count_check":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":2103.77405,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_ctrl_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":15.0,"sim_time":14244.584182,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_readback_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":15.0,"sim_time":14244.584182,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_exec_config_regwen":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":18.225068999999998,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_exec_config_mubi":{"tests":{"sram_ctrl_executable":{"max_time":14.0,"sim_time":1396.677978,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_exec_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":14.0,"sim_time":1396.677978,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":14.0,"sim_time":1396.677978,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_lc_escalate_en_intersig_mubi":{"tests":{"sram_ctrl_lc_escalation":{"max_time":9.0,"sim_time":2324.387291,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_prim_ram_ctrl_mubi":{"tests":{"sram_ctrl_mubi_enc_err":{"max_time":2.0,"sim_time":34.828112999999995,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_mem_integrity":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":4.0,"sim_time":788.5627290000001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_mem_readback":{"tests":{"sram_ctrl_readback_err":{"max_time":2.0,"sim_time":69.03606500000001,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_mem_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":111.98236999999999,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_addr_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":111.98236999999999,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_instr_bus_lc_gated":{"tests":{"sram_ctrl_executable":{"max_time":14.0,"sim_time":1396.677978,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_ram_tl_lc_gate_fsm_sparse":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_key_global_esc":{"tests":{"sram_ctrl_lc_escalation":{"max_time":9.0,"sim_time":2324.387291,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_key_local_esc":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_init_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_scramble_key_sideload":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":111.98236999999999,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"sec_cm_tlul_fifo_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":4.0,"sim_time":529.06333,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":88,"total":88,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"sram_ctrl_stress_all_with_rand_reset":{"max_time":112.0,"sim_time":3462.030514,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0}},"coverage":{"code":{"block":94.03,"line_statement":95.21,"branch":89.83,"condition_expression":null,"toggle":82.28,"fsm":66.67},"assertion":98.08,"functional":96.8},"cov_report_page":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (sram_ctrl_throughput_vseq.sv:66) [sram_ctrl_throughput_vseq] Check failed num_cycles == num_ops + * + num_partial_write * * (* [*] vs * [*])":[{"name":"sram_ctrl_max_throughput","qual_name":"0.sram_ctrl_max_throughput.63803121882890155517864216672680342318202330388243171759005553389204028030460","seed":63803121882890155517864216672680342318202330388243171759005553389204028030460,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @  44301451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"0.sram_ctrl_throughput_w_partial_write.95631051142375352136487562555188138510036785043872637951824982448472283002542","seed":95631051142375352136487562555188138510036785043872637951824982448472283002542,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @ 100237341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"1.sram_ctrl_max_throughput.9883753616064402746963945582933467268934530850088339486914544379569412321902","seed":9883753616064402746963945582933467268934530850088339486914544379569412321902,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/1.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @ 102949749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"1.sram_ctrl_throughput_w_partial_write.45821559119126535771506854849037489305915131619466007782702516142547631886941","seed":45821559119126535771506854849037489305915131619466007782702516142547631886941,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/1.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @ 100526581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"2.sram_ctrl_max_throughput.114538400847964957607671981783664944147689382653798546669078713552564499016176","seed":114538400847964957607671981783664944147689382653798546669078713552564499016176,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/2.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @ 103339603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"2.sram_ctrl_throughput_w_partial_write.47031704101538984715259402801182650572703767562410627744382279944861527799778","seed":47031704101538984715259402801182650572703767562410627744382279944861527799778,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/2.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  49941330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"3.sram_ctrl_max_throughput.55873932794729289859777795300134724528155223101358696888016635699437303752705","seed":55873932794729289859777795300134724528155223101358696888016635699437303752705,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/3.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @  25683254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"3.sram_ctrl_throughput_w_partial_write.103825327831936470591038130643015174929126454317498503402025394034266120826778","seed":103825327831936470591038130643015174929126454317498503402025394034266120826778,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/3.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  30953324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"4.sram_ctrl_max_throughput.112531640208086156701836581642039933434161249829330102059195890566065836519343","seed":112531640208086156701836581642039933434161249829330102059195890566065836519343,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/4.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @ 151840323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"4.sram_ctrl_throughput_w_partial_write.32952706775164254269327395572528076249150236692373044466005616230546549575527","seed":32952706775164254269327395572528076249150236692373044466005616230546549575527,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/4.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  51858112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"5.sram_ctrl_max_throughput.71252795614539449681179433154164986186705424989100774107343583654134451988535","seed":71252795614539449681179433154164986186705424989100774107343583654134451988535,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/5.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @  28313887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"5.sram_ctrl_throughput_w_partial_write.5804323482994187245415982986287935629161655250421201937235763205793122240175","seed":5804323482994187245415982986287935629161655250421201937235763205793122240175,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/5.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  79676189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"6.sram_ctrl_max_throughput.21263599710698092925378214529184548591915525554975793718050198439644134250952","seed":21263599710698092925378214529184548591915525554975793718050198439644134250952,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/6.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @  59518052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"6.sram_ctrl_throughput_w_partial_write.27649556644775651843289058142708960643882263709387429173553294799848973651285","seed":27649556644775651843289058142708960643882263709387429173553294799848973651285,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/6.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  99439453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"7.sram_ctrl_max_throughput.76826734547507766574566929714154759174002585836036610038438123014657839949674","seed":76826734547507766574566929714154759174002585836036610038438123014657839949674,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/7.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @ 142749343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"7.sram_ctrl_throughput_w_partial_write.82758135514258147176185817976833784247472547833554137812993384927679368682065","seed":82758135514258147176185817976833784247472547833554137812993384927679368682065,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/7.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  66724723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (sram_ctrl_throughput_vseq.sv:64) [sram_ctrl_throughput_vseq] Check failed num_cycles == num_writes * * + num_reads * * - last_was_write (* [*] vs * [*])":[{"name":"sram_ctrl_throughput_w_readback","qual_name":"0.sram_ctrl_throughput_w_readback.115226252176584639502856933994344675866713008212209229929198053974197080638611","seed":115226252176584639502856933994344675866713008212209229929198053974197080638611,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 221467823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"1.sram_ctrl_throughput_w_readback.5629951315829157046845219981600544663878435988960715731357631371805934518356","seed":5629951315829157046845219981600544663878435988960715731357631371805934518356,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/1.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 117763895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"2.sram_ctrl_throughput_w_readback.4148913851182023335605219863953019783729220153698063458671625180709591552155","seed":4148913851182023335605219863953019783729220153698063458671625180709591552155,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/2.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 212472551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"3.sram_ctrl_throughput_w_readback.8542859427532879244425582692050009701107252739413047561929685775593547446894","seed":8542859427532879244425582692050009701107252739413047561929685775593547446894,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/3.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 120006664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"4.sram_ctrl_throughput_w_readback.67312775890727189302040795226884397736487059721345408922728941008362827541305","seed":67312775890727189302040795226884397736487059721345408922728941008362827541305,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/4.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @  31011231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"5.sram_ctrl_throughput_w_readback.70968188991835504158238017746033124300695245532184168711757567429115174123693","seed":70968188991835504158238017746033124300695245532184168711757567429115174123693,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/5.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @  59874480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"6.sram_ctrl_throughput_w_readback.65199749256454662121690734177238115458666089785505281805585722008381168268027","seed":65199749256454662121690734177238115458666089785505281805585722008381168268027,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/6.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 104329679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"7.sram_ctrl_throughput_w_readback.104778524281481903870041191174710832311604187671253835086312921670085831466223","seed":104778524281481903870041191174710832311604187671253835086312921670085831466223,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/7.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @ 118306760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":224,"total":248,"percent":90.3225806451613}