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[UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_prim_fifo_*/rtl/prim_fifo_sync.sv,224): Assertion DataKnown_A has failed":[{"name":"otbn_sec_cm","qual_name":"0.otbn_sec_cm.9329533277980730326840846002970580223911891224440637374229179516853301130635","seed":9329533277980730326840846002970580223911891224440637374229179516853301130635,"line":90,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sec_cm/latest/run.log","log_context":["UVM_ERROR @   8255372 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A\n","UVM_INFO @   8255372 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"otbn_sec_cm","qual_name":"2.otbn_sec_cm.39484504398772988017906368472129965894158778029930131599980994493760533081843","seed":39484504398772988017906368472129965894158778029930131599980994493760533081843,"line":126,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_sec_cm/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_prim_fifo_0/rtl/prim_fifo_sync.sv,211): (time 417209132 PS) Assertion tb.dut.u_otbn_core.gen_mai.u_otbn_mai.u_otbn_mask_accelerator.u_prim_fifo_sync_mask.gen_normal_fifo.depthShallNotExceedParamDepth has failed \n","UVM_ERROR @ 417209132 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A\n","UVM_INFO @ 417209132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]},{"name":"otbn_sec_cm","qual_name":"3.otbn_sec_cm.27703269483604315537448408480939886229312014873880039146256335472805995949653","seed":27703269483604315537448408480939886229312014873880039146256335472805995949653,"line":85,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/3.otbn_sec_cm/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_prim_fifo_0/rtl/prim_fifo_sync.sv,211): (time 5023584 PS) Assertion tb.dut.u_otbn_core.gen_mai.u_otbn_mai.u_otbn_mask_accelerator.u_prim_fifo_sync_mask.gen_normal_fifo.depthShallNotExceedParamDepth has failed \n","UVM_ERROR @   5023584 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A\n","UVM_INFO @   5023584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]},{"name":"otbn_sec_cm","qual_name":"4.otbn_sec_cm.35131778609087927149898612765054089995131695637647094599793201142225817522572","seed":35131778609087927149898612765054089995131695637647094599793201142225817522572,"line":117,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/4.otbn_sec_cm/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_prim_fifo_0/rtl/prim_fifo_sync.sv,211): (time 206600543 PS) Assertion tb.dut.u_otbn_core.gen_mai.u_otbn_mai.u_otbn_mask_accelerator.u_prim_fifo_sync_mask.gen_normal_fifo.depthShallNotExceedParamDepth has failed \n","UVM_ERROR @ 206600543 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A\n","UVM_INFO @ 206600543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}],"UVM_ERROR (cip_base_vseq.sv:1287) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"2.otbn_stress_all_with_rand_reset.12211815749301759248389008526660205705337795090076576561548036516440078052132","seed":12211815749301759248389008526660205705337795090076576561548036516440078052132,"line":183,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 377855185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"4.otbn_stress_all_with_rand_reset.17484199231087391137162711669566084147906841785631386759125123428311644871208","seed":17484199231087391137162711669566084147906841785631386759125123428311644871208,"line":329,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/4.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 16740320998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"5.otbn_stress_all_with_rand_reset.93341789364009585433538505161461258391248443717115563262376213338803681948909","seed":93341789364009585433538505161461258391248443717115563262376213338803681948909,"line":176,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 286297334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"7.otbn_stress_all_with_rand_reset.44955961005046056217922933375617370110936538227068942486939390237242886971150","seed":44955961005046056217922933375617370110936538227068942486939390237242886971150,"line":352,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 913337130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_rnd_if.sv,175): Assertion EdgePREFETCHINGToFULL_A has failed (* cycles, starting * PS)":[{"name":"otbn_dmem_err","qual_name":"5.otbn_dmem_err.112719786619517556572121097953191359957226549819949742859914712953425252975632","seed":112719786619517556572121097953191359957226549819949742859914712953425252975632,"line":112,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/5.otbn_dmem_err/latest/run.log","log_context":["UVM_ERROR @  12938537 ps: (otbn_rnd_if.sv:175) [ASSERT FAILED] EdgePREFETCHINGToFULL_A\n","UVM_INFO @  12938537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL (otbn_base_vseq.sv:348) [otbn_dmem_err_vseq] Check failed (!cfg.under_reset)":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"6.otbn_stress_all_with_rand_reset.109266758869656175421188809053279133000184457779489990860113272317880935769059","seed":109266758869656175421188809053279133000184457779489990860113272317880935769059,"line":246,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 5826145500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (otbn_scoreboard.sv:550) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived.":[{"name":"otbn_multi","qual_name":"9.otbn_multi.113461007308543147956875177655699294768609528831026580744170685683479575112935","seed":113461007308543147956875177655699294768609528831026580744170685683479575112935,"line":150,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/9.otbn_multi/latest/run.log","log_context":["UVM_INFO @  95334781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":418,"total":436,"percent":95.87155963302752}