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(uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$']":[{"name":"otbn_escalate","qual_name":"2.otbn_escalate.86966153838800484674083300361882089733059005817773949598771798643506424397847","seed":86966153838800484674083300361882089733059005817773949598771798643506424397847,"line":null,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/2.otbn_escalate/latest/run.log","log_context":["                        ~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^\n","  File \"/nightly/current_run/opentitan/hw/ip/otbn/dv/rig/rig/gens/bad_deep_loop.py\", line 122, in _gen_loop_head\n","    enc_bodysize, end_addr = self._pick_bodysize(insn, model.pc, program)\n","                             ~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^\n","  File \"/nightly/current_run/opentitan/hw/ip/otbn/dv/rig/rig/gens/bad_deep_loop.py\", line 67, in _pick_bodysize\n","    assert bodysize is not None\n","           ^^^^^^^^^^^^^^^^^^^^\n","AssertionError\n","ninja: build stopped: subcommand failed.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 1\n"]},{"name":"otbn_illegal_mem_acc","qual_name":"2.otbn_illegal_mem_acc.93822670163127838012355184220208570386094263735727616772722023035365974871806","seed":93822670163127838012355184220208570386094263735727616772722023035365974871806,"line":null,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/2.otbn_illegal_mem_acc/latest/run.log","log_context":["                        ~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^\n","  File \"/nightly/current_run/opentitan/hw/ip/otbn/dv/rig/rig/gens/bad_deep_loop.py\", line 122, in _gen_loop_head\n","    enc_bodysize, end_addr = self._pick_bodysize(insn, model.pc, program)\n","                             ~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^\n","  File \"/nightly/current_run/opentitan/hw/ip/otbn/dv/rig/rig/gens/bad_deep_loop.py\", line 67, in _pick_bodysize\n","    assert bodysize is not None\n","           ^^^^^^^^^^^^^^^^^^^^\n","AssertionError\n","ninja: build stopped: subcommand failed.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 1\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal has unexpected timeout error":[{"name":"otbn_controller_ispr_rdata_err","qual_name":"3.otbn_controller_ispr_rdata_err.56226825898183028387809076280684898777726962888342071819907574167126539426931","seed":56226825898183028387809076280684898777726962888342071819907574167126539426931,"line":112,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/3.otbn_controller_ispr_rdata_err/latest/run.log","log_context":["UVM_INFO @  59584138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_rf_bignum_intg_err","qual_name":"4.otbn_rf_bignum_intg_err.25474847596467085308538658146703589467451700343331688609138734398637641724362","seed":25474847596467085308538658146703589467451700343331688609138734398637641724362,"line":109,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/4.otbn_rf_bignum_intg_err/latest/run.log","log_context":["UVM_INFO @  62624357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"5.otbn_stress_all_with_rand_reset.53031956325957220910017960854907966044606438013646129540972166383513683144425","seed":53031956325957220910017960854907966044606438013646129540972166383513683144425,"line":148,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 115190493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_escalate","qual_name":"56.otbn_escalate.53621953699059606843377320176763540360845448212256754182204425022596159929861","seed":53621953699059606843377320176763540360845448212256754182204425022596159929861,"line":106,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/56.otbn_escalate/latest/run.log","log_context":["UVM_INFO @  30058204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"6.otbn_stress_all_with_rand_reset.18602272497836013802354209787840982141137759985290541131005138280805926730407","seed":18602272497836013802354209787840982141137759985290541131005138280805926730407,"line":297,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 915541369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"7.otbn_stress_all_with_rand_reset.18875705592991928372699706695082884876610213771677578156623664424961521047894","seed":18875705592991928372699706695082884876610213771677578156623664424961521047894,"line":178,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 4820419908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"9.otbn_stress_all_with_rand_reset.46082483031679345975984188607411707261147253499578793005395101478239386041427","seed":46082483031679345975984188607411707261147253499578793005395101478239386041427,"line":157,"log_path":"/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/9.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 127402817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":420,"total":436,"percent":96.3302752293578}